at25128b ATMEL Corporation, at25128b Datasheet
at25128b
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at25128b Summary of contents
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... TSSOP, 8-ball dBGA2 and 8-lead SAP packages. In addition, the entire family is available in 1.8V (1.8V to 5.5V). The AT25128B/256B is enabled through the Chip Select pin ( 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate Erase cycle is required before Write ...
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... Separate Program Enable and Program Disable instructions are provided for additional data protection. Hardware data protection is provided via the pin to protect against inadvertent write attempts to the status register. The used to suspend any serial communication without resetting the serial sequence. AT25128B/256B [Preliminary] 2 8-lead SOIC 8-lead TSSOP ...
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... Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol C Output Capacitance (SO) OUT C Input Capacitance ( IN Note: 1. This parameter is characterized and is not 100% tested. 8593A–SEEPR–01/09 AT25128B/256B [Preliminary] *NOTICE: Stresses V GND CC ADDRESS MEMORY ARRAY DECODER 16284/32768 x 8 DATA REGISTER MODE DECODE ...
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... IH V Output Low-voltage OL1 V Output High-voltage OH1 V Output Low-voltage OL2 V Output High-voltage OH2 Note min and V IL AT25128B/256B [Preliminary −40°C to +85° Test Conditions MHz Open, CC Read MHz Open, CC Read, Write MHz Open, CC Read, Write ...
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... H t Setup Time HD Hold Time Output Vaild V t Output Hold Time Output Low Z LZ 8593A–SEEPR–01/09 AT25128B/256B [Preliminary] = −40° 85° Parameter Voltage 4.5−5.5 2.5−5.5 1.8−5.5 4.5−5.5 2.5−5.5 1.8−5.5 4.5−5.5 2.5−5.5 1.8−5.5 4.5−5.5 2.5−5.5 1.8−5.5 4.5−5.5 2.5− ...
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... The write protect pin ( inhibited. internal write cycle has already been initiated, operation to the status register. The status register is “0”. This will allow the user to install the AT25128B/256B in a system with the enabled when the WPEN bit is set to “1”. AT25128B/256B [Preliminary] 6 ...
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... Figure 3. SPI Serial Interface MASTER: MICROCONTROLLER DATA OUT (MOSI) DATA IN (MISO) SERIAL CLOCK (SPI CK) 8593A–SEEPR–01/09 SLAVE: AT25128B/256B SI SO SCK SS0 CS SS1 SI SS2 SO SS3 SCK SCK SCK CS AT25128B/256B [Preliminary] 7 ...
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... Functional Description The AT25128B/256B is designed to interface directly with the synchronous serial peripheral interface (SPI) of the 6800 type series of microcontrollers. The AT25128B/256B utilizes an 8-bit instruction register. The list of instructions and their operation codes are contained in Figure 6. All instructions, addresses, and data are transferred with the MSB first and start with a high-to- low transition ...
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... WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection. The AT25128B/256B is divided into four array segments. Top quarter (1/4), top half (1/2), or all of the memory segments can be protected. Any of the data within any selected segment will therefore be read only. The block write ...
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... Write cycle is still in progress. If Bit the Write cycle has ended. Only the Read Status Register instruction is enabled during the Write programming cycle. The AT25128B/256B is capable of a 64-byte Page Write operation. After each byte of data is received, the six low order address bits are internally incremented by one; the high order bits of the address will remain constant. If more than 64 bytes of data are transmitted, the address counter will roll over and the previously written data will be overwritten ...
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... Figure 5. WREN Timing CS SCK SI SO Figure 6. WRDI Timing CS SCK SI SO Figure 7. RDSR Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO 8593A–SEEPR–01/09 AT25128B/256B [Preliminary] WREN OP-CODE HI-Z WRDI OP-CODE HI MSB DATA OUT ...
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... HIGH IMPEDANCE SO Figure 9. READ Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO Figure 10. WRITE Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO AT25128B/256B [Preliminary INSTRUCTION BYTE ADDRESS ... ...
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... Figure 11. Timing CS SCK SI SO 8593A–SEEPR–01/09 AT25128B/256B [Preliminary ...
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... Package Ordering Information AT25128B Ordering Information Table 11. AT25128B Ordering Information Ordering Code (1) AT25128B-PU (1) AT25128BN-SU (1) AT25128BW-SU (1) AT25128B-TU (1) AT25128BU2-UU (1) AT25128BY6-YH (2) AT25128B-W-11 Notes: 1. “U” designates Green package + RoHS compliant. 2. Available in waffle pack and wafer form; order as SL788 for wafer form. Bumped die available upon request ...
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... Ball Grid Array Package (dBGA2) 8A2 8-lead, 4.40 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) 8-lead, 2. 3.00 mm Body, 0.50 mm Pitch, Ultra Thin Mini-MAP, Dual No Lead Package (DFN), 8Y6 (MLP 2x3mm) 8593A–SEEPR–01/09 AT25128B/256B [Preliminary] Package Voltage Range 8P3 1.8 8S1 1.8 8S2 1 ...
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... AT25128B Part Markings AT25128BU2-UU-T TOP MARK |---|---|---|---| |---|---|---|---|---| |---|---|---|---|---| * <-- Pin 1 Indicator P = Country of Origin Y = One Digit Year Code M = One Digit Month Code XX = TRACE CODE (ATMEL LOT NUMBERS TO CORRESPOND WITH TRACE CODE LOG BOOK) (e. AA, AB...YZ, ZZ ONE DIGIT YEAR CODE 4: 2004 ...
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... Week Week Country of Assembly No Bottom Mark 8593A–SEEPR–01/09 8Y6 Ultra Thin Mini-MAP 8P3 PDIP Seal Year | Seal Week | | | SEAL WEEK WW = SEAL WEEK 02 = Week Week Week Week :::: : :: : :::: : 52 = Week :::: :: AT25128B/256B [Preliminary] 17 ...
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... D B |---|---|---|---|---|---|---| ATMEL LOT NUMBER |---|---|---|---|---|---|---| Y = SEAL YEAR 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 @ = Country of Assembly No Bottom Mark AT25128B/256B [Preliminary] 18 8S1 JEDEC SOIC 8S2 EIAJ SOIC Seal Year | Seal Week | | | SEAL WEEK WW = SEAL WEEK 02 = Week Week Week 4 ...
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... WITH TRACE CODE LOG BOOK) (e. AA, AB...YZ, ZZ ONE DIGIT YEAR CODE 4: 2004 7: 2007 5: 2005 8: 2008 6: 2006 9: 2009 M = SEAL MONTH (USE ALPHA DESIGNATOR A- JANUARY B = FEBRUARY """"""" OCTOBER K = NOVEMBER L = DECEMBER 8593A–SEEPR–01/09 8U2-1 dBGA2 X AT25128B/256B [Preliminary] 19 ...
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... Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot SEAL YEAR 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 50 = Week Week Country of Assembly No Bottom Mark AT25128B/256B [Preliminary] 20 8Y6 Ultra Thin Mini-MAP 8P3 PDIP Seal Year | Seal Week | | | SEAL WEEK WW = SEAL WEEK 02 = Week 2 ...
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... JEDEC SOIC 8S2 EIAJ SOIC Seal Year | Seal Week | | | SEAL WEEK WW = SEAL WEEK 02 = Week Week Week Week :::: : :: : :::: : 52 = Week :::: :: 8A2 TSSOP SEAL WEEK 02 = Week Week :::: : 52 = Week 52 AT25128B/256B [Preliminary] 21 ...
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... E and eA measured with the leads const r ained to be perpendicular to datum. 5. Pointed or rounded lead tips are pre ferred to ease insertion and b3 maximum dimensions do not include Dambar prot r usions. Dambar protrusions shall not • exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT25128B/256B [Preliminary ...
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... E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 8593A–SEEPR–01/ TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT25128B/256B [Preliminary End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 1.35 – ...
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... It is recommended that upper and l o wer cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT25128B/256B [Preliminary ...
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... A1 BALL PAD CORNER e (e1) 1. Dimension 'b' is measured at the maxi mum solder ball diamete r. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 8593A–SEEPR–01/09 AT25128B/256B [Preliminary Top View A1 BALL PAD CORNER ...
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... Dimension b does not include Dambar prot rusion. Allowable Dambar prot rusion shall be 0.08 mm total in excess of the b dimension at maxi mum mate rial condition . Dambar cannot be located on the l ower radius of the foot. Minimum space between protrusion and adjacent lead is 0. Dimension D and dete rmined at Datum Plane H . Package Drawing Contact:• packagedrawings@atmel.com AT25128B/256B [Preliminary ...
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... Package Drawing Contact:• packagedrawings@atmel.com 8593A–SEEPR–01/09 Pin 1 Index Area A2 A3 TITLE 8Y6, 8-lead, 2.0x3.0 mm Body, 0.50 mm Pitch, UltraThin Mini-MAP, Dual No Lead Package (Sawn)(UDFN) AT25128B/256B [Preliminary (6X) A1 1.50 REF. COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL D 2.00 BSC E 3 ...
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... Revision History Doc. Rev. Date 8593A 01/2009 AT25128B/256B [Preliminary] 28 Initial document release. Comments 8593A–SEEPR–01/09 ...
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... Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2009 Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. ...