at49bv802a ATMEL Corporation, at49bv802a Datasheet
at49bv802a
Available stocks
Related parts for at49bv802a
at49bv802a Summary of contents
Page 1
... The x16 data appears on I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sec- tors for erase operations. The AT49BV802A(T) is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention ...
Page 2
... I/O15 pin is used as an input for the LSB (A-1) address function. 2. Pin Configurations Pin Name A0 - A18 RESET RDY/BUSY I/O0 - I/O14 I/O15 (A-1) BYTE NC AT49BV802A(T) 2 Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Data Inputs/Outputs I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode) Selects Byte or Word Mode No Connect 3405E– ...
Page 3
... WE A9 A13 B A4 A17 NC RST A8 A12 A18 NC A10 A14 A11 A15 E A0 I/O0 I/O2 I/O5 I/O7 A16 F CE I/O8 I/O10 I/O12 I/O14 BYTE G OE I/O9 I/O11 VCC I/O13 I/015/A-1 H VSS I/O1 I/O3 I/O4 I/O6 VSS AT49BV802A(T) A16 BYTE GND I/O15/A-1 I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 I/O8 I/O0 OE GND ...
Page 4
... Read The AT49BV802A(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins are asserted on the out- puts. The outputs are put in the high impedance state whenever high. This dual-line control gives designers flexibility in preventing bus contention ...
Page 5
... Data Polling feature or the Toggle Bit feature may be used to indicate the end of a program cycle. If the erase/program status bit is a “1”, the device was not able to verify that the erase or program operation was performed successfully. 3405E–FLASH–2/07 AT49BV802A(T) . When the sector programming lockdown feature is not SEC . ...
Page 6
... I/O7 status bit as described below. 4.6.1 DATA Polling The AT49BV802A(T) features Data Polling to indicate the end of a program cycle. If the status configuration register is set to a “00”, during a program cycle an attempted read of the last byte/word loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. During a chip or sector erase operation, an attempt to read the device will give a “ ...
Page 7
... The command sequence for a chip erase sus- pend and a sector erase suspend are the same. 3405E–FLASH–2/07 sections on page 24), a read from address location 00002H within a sector will show AT49BV802A(T) “Status Bit Table” on page 12 for more details. “Software Product Identification 7 ...
Page 8
... Protection Register The AT49BV802A(T) contains a 128-bit register that can be used for security purposes in sys- tem design. The protection register is divided into two 64-bit blocks. The two blocks are designated as block A and block B. The data in block A is non-changeable and is programmed at the factory with a unique number ...
Page 9
... Hardware Data Protection The Hardware Data Protection feature protects against inadvertent programs to the AT49BV802A(T) in the following ways: (a) V function is inhibited. (b) V device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: hold- ing any one of OE low, CE high or WE high inhibits program cycles. ...
Page 10
... VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. I/O7 should be rechecked even if I/O5 = “1” because I/O7 may change simultaneously with I/O5. AT49BV802A(T) 10 Figure 4-2. YES YES Program/Erase Operation ...
Page 11
... The system should recheck the toggle bit even if I/O5 = “1” because the toggle bit may stop toggling as I/O5 changes to “1”. 3405E–FLASH–2/07 Figure 4- Program/Erase Operation Successful, Device in Read Mode Note: AT49BV802A(T) Toggle Bit Algorithm (Configuration Register = 01) START Read I/O7 - I/O0 Read I/O7 - I/O0 NO Toggle Bit = Toggle? YES NO I/ YES ...
Page 12
... Non-suspended Sectors Program Suspended & Read Programming Sector Program Suspended & Read Non-programming Sector Notes: 1. I/O5 switches to a “1” when a program or an erase operation has exceeded the maximum time limits or when a program or sector erase operation is performed on a protected sector. AT49BV802A(T) 12 I/O7 I/O7 I/ 00/01 ...
Page 13
... AA AAA 55 555 F0 ( AAA 55 555 C0 AA AAA 55 555 C0 AA AAA 55 555 90 AA AAA 55 555 D0 98 AT49BV802A(T) 4th Bus 5th Bus Cycle Cycle Addr Data Addr Data 555 AA AAA 55 555 AA AAA 55 Addr D IN 555 AA AAA 55 555 AA AAA 55 Addr D IN ...
Page 14
... Protection Register Addressing Table Word Use Block 0 Factory 1 Factory 2 Factory 3 Factory 4 User 5 User 6 User 7 User Note: All address lines not specified in the above table must be “0” when accessing the protection register, i.e., A18 - AT49BV802A(T) 14 *NOTICE ...
Page 15
... AT49BV802A – Sector Address Table Sector Size (Bytes/Words) SA0 8K/4K SA1 8K/4K SA2 8K/4K SA3 8K/4K SA4 8K/4K SA5 8K/4K SA6 8K/4K SA7 8K/4K SA8 64K/32K SA9 64K/32K SA10 64K/32K SA11 64K/32K SA12 64K/32K SA13 64K/32K SA14 64K/32K SA15 64K/32K SA16 64K/32K SA17 64K/32K SA18 64K/32K SA19 64K/32K SA20 ...
Page 16
... AT49BV802AT – Sector Address Table Sector Size (Bytes/Words) SA0 64K/32K SA1 64K/32K SA2 64K/32K SA3 64K/32K SA4 64K/32K SA5 64K/32K SA6 64K/32K SA7 64K/32K SA8 64K/32K SA9 64K/32K SA10 64K/32K SA11 64K/32K SA12 64K/32K SA13 64K/32K SA14 64K/32K SA15 8K/4K SA16 8K/4K SA17 ...
Page 17
... Software Notes can Refer to AC programming waveforms 12.0V ± 0.5V Manufacturer Code: 1FH (x8); 001FH (x16), Device Code: 00C1H - AT49BV802A; 00C3H - AT49BV802AT. 5. See details under “Software Product Identification Entry/Exit” 3405E–FLASH–2/07 Ind RESET ...
Page 18
... V Input High Voltage IH V Output Low Voltage OL1 V Output Low Voltage OL2 V Output High Voltage OH1 V Output High Voltage OH2 Note the erase mode mA. CC AT49BV802A(T) 18 Condition Min I 0. MHz OUT mA 2 ...
Page 19
... RC ADDRESS VALID ACC t RO HIGH after the address transition without impact on t ACC after the falling edge of CE without impact AT49BV802A(T) AT49BV802A(T)-70 Min Max 100 OUTPUT VALID . ACC ...
Page 20
... Input Test Waveforms and Measurement Level 17. Output Test Load 18. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. AT49BV802A( < Max Units Conditions OUT ...
Page 21
... Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH 20. AC Byte/Word Load Waveforms 20.1 WE Controlled 20.2 CE Controlled 3405E–FLASH–2/07 AT49BV802A(T) Min Max Units ...
Page 22
... For chip erase, the address should be 555. For sector erase, the address depends on what sector erased. (See note 3 under “Command Definition Table” on page 3. For chip erase, the data should be 10H, and for sector erase, the data should be 30H. AT49BV802A(T) 22 PROGRAM CYCLE t ...
Page 23
... Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 3405E–FLASH–2/07 (1) 19. t OEH HIGH (1) 19. (1)(2)(3) AT49BV802A(T) Min Typ Min Typ specification must be met by the toggling ...
Page 24
... Device Code is read for The device does not remain in identification mode if pow- ered down. 4. The device returns to standard operation mode. 5. Manufacturer Code: 1FH(x8); 001FH(x16) Device Code:00C1H - AT49BV802A; 00C3H - AT49BV802AT. 6. Either one of the Product ID Exit commands can be used. AT49BV802A(T) 24 30. Sector Lockdown Enable Algorithm ...
Page 25
... Multiple byte write not supported 0000h Multiple byte write not supported 0002h 2 regions 000Eh 64K bytes 0000h 64K bytes 0000h 64K bytes 256 0001h 64K bytes 256 0007h 8K bytes 0000h 8K bytes 0020h 8K bytes 0000h 8K bytes AT49BV802A( ...
Page 26
... AT49BV802A(T) 26 Data Comments Vendor Specific Extended Query 0050h “P” 0052h “R” 0049h “I” 0031h Major version number, ASCII 0030h Minor version number, ASCII Bit 0 – ...
Page 27
... Plastic Thin Small Outline Package (TSOP) 3405E–FLASH–2/07 Ordering Code Package AT49BV802A-70CI 48C19 AT49BV802A-70TI AT49BV802AT-70CI 48C19 AT49BV802AT-70TI Ordering Code Package AT49BV802A-70TU AT49BV802AT-70TU Package Type AT49BV802A(T) Operation Range Industrial 48T (-40° to 85° C) Industrial 48T (-40° to 85° C) Operation Range Industrial 48T (-40° ...
Page 28
... A1 Ball ID D Top View 1.0 REF Ø Bottom View 2325 Orchard Parkway San Jose, CA 95131 R AT49BV802A( Ball Corner e 1.20 REF TITLE 48C19, 48-ball ( Array), 0.80 mm Pitch, 6.0 x 8.0 x 1.0 mm Chip-scale Ball Grid Array Package (CBGA ...
Page 29
... Orchard Parkway San Jose, CA 95131 R 3405E–FLASH–2/07 PIN SEATING PLANE A1 TITLE 48T, 48-lead ( Package) Plastic Thin Small Outline Package, Type I (TSOP) AT49BV802A(T) 0º ~ 8º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – ...
Page 30
... AT49BV802A(T) 30 • Initial Release • Removed AT49BV808A(T) device from datasheet • Modified CBGA Pinout and Package Drawing for AT49BV802A(T) • Removed Preliminary from the datasheet • Converted datasheet to New Template. • Added TSOP Green Package (Pb/Halide-free). • Moved to Mature Products -- Not recommended for New Designs. 3405E– ...
Page 31
... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...