is43dr16320b3dbi

Manufacturer Part Numberis43dr16320b3dbi
Description512mb X8, X16 Ddr2 Sdram
ManufacturerIntegrated Silicon Solution, Inc.
is43dr16320b3dbi datasheet
 
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IS43/46DR86400B, IS43/46DR16320B  
512Mb (x8, x16) DDR2 SDRAM
FEATURES 
Clock frequency up to 400MHz 
Posted CAS 
Programmable CAS Latency: 3, 4, 5 and 6 
Programmable Additive Latency: 0, 1, 2, 3, 4 and 5 
Write Latency = Read Latency‐1 
Programmable Burst Sequence: Sequential or 
Interleave 
Programmable Burst Length: 4 and 8 
Automatic and Controlled Precharge Command 
Power Down Mode 
Auto Refresh and Self Refresh 
Refresh Interval: 7.8 μs (8192 cycles/64 ms) 
OCD (Off‐Chip Driver Impedance Adjustment) 
ODT (On‐Die Termination) 
Weak Strength Data‐Output Driver Option 
Bidirectional differential Data Strobe (Single‐
ended data‐strobe is an optional feature) 
OPTIONS   
 
• Configuration: 
64Mx8 (16M x 8 x 4 banks) 
32Mx16 (8M x 16 x 4 banks)  
• Package: 
60‐ball FBGA  for x8 
84‐ball FBGA for x16 
Clock Cycle Timing 
 
‐5B 
 Speed Grade 
DDR2‐400B 
CL‐tRCD‐tRP 
3‐3‐3 
tCK (CL=3) 
tCK (CL=4) 
tCK (CL=5) 
tCK (CL=6) 
Frequency (max) 
200 
Note: The ‐5B device specification is shown for reference only. 
 
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
 
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
 
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
 
 
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. C, 8/17/2010
On‐Chip DLL aligns DQ and DQs transitions with 
CK transitions 
Differential clock inputs CK and CK# 
VDD and VDDQ = 1.8V ± 0.1V 
PASR (Partial Array Self Refresh) 
SSTL_18 interface 
tRAS lockout supported 
Read Data Strobe supported (x8 only) 
Internal four bank operations with single pulsed 
RAS 
Operating temperature: 
Commercial (T
Industrial (T
Automotive, A1 (T
+95°C) 
Automotive, A2 (T
to +105°C) 
ADDRESS TABLE 
Parameter
Row  Addressing
Column Addressing
Bank Addressing
Precharge Addressing
‐37C 
‐3D 
DDR2‐533C 
DDR2‐667D 
4‐4‐4 
5‐5‐5 
3.75 
3.75 
3.75 
3.75 
266 
333 
AUGUST 2010
= 0°C to +70°C ; T
= 0°C to +85°C) 
= ‐40°C to +85°C; T
= ‐40°C to +95°C) 
= ‐40°C to +85°C; T
= ‐40°C to 
= ‐40°C to +105°C; T
= ‐40°C 
64Mx8 
32Mx16
A0‐A13 
A0‐A12
A0‐A9 
A0‐A9
BA0‐BA1 
BA0‐BA1
A10 
A10
‐25E 
‐25D 
DDR2‐800E 
DDR2‐800D 
6‐6‐6 
5‐5‐5 
3.75 
3.75 
2.5 
2.5 
2.5 
400 
400 
Units 
 
tCK 
ns 
ns 
ns 
ns 
MHz 
1

is43dr16320b3dbi Summary of contents

  • Page 1

    ... Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized ...

  • Page 2

    ... DLL ground ODT On Die Termination Enable NC No connect Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Notes: 1. Pins B3 and A2 have identical capacitance as pins B7  and A8. 2. For a read, when enabled, strobe pair RDQS & RDQS#  ...

  • Page 3

    ... DLL ground ODT On Die Termination Enable NC No connect Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Note: VDDL and VSSDL are power and ground for the DLL. It  is recommended that they are isolated on the device  from VDD, VDDQ, VSS, and VSSQ. ...

  • Page 4

    ... Note:  1. To guarantee ODT off, VREF must be valid and a LOW level must be applied to the ODT pin.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 1  at a LOW state (all other inputs may be  ...

  • Page 5

    ... Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 6

    ... A3  ‐  A5  determines  the  additive  latency,  A2  and  A6  are  used  for  ODT  value  selection, A7 ‐ A9 are used for OCD control, A10 is used for DQS# disable and A11 is used for RDQS enable.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 A12 Active  ...

  • Page 7

    ... Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 8

    ... No function is defined in extended mode register 3. The default value of the extended mode register 3 is not defined. Therefore, the  extended mode register 3 must be programmed during initialization for proper operation.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 9

    ... VREF must be maintained during Self Refresh operation.  9. An refers to the MSBs of addresseses. An=A13 for x8, and An=A12 for x16.     Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 BA0 A13 A12 A11 ...

  • Page 10

    ... Name (Functional) Write Enable Write Inhibit Note:   1. Used to mask write data, provided coincident with the corresponding data.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 CKE Command (N) (1) RAS#, CAS#, WE#, CS# Current Cycle ...

  • Page 11

    ... REFRESH is used during normal operation of the DDR2 SDRAM and is analogous to CAS#‐before‐RAS# (CBR) REFRESH. All banks must  be in the idle mode prior to issuing a REFRESH command. This command is nonpersistent, so it must be issued each time a refresh is  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 12

    ... ODT turn off time min, tAOF(Min), is when the device starts to turn off the ODT resistance. ODT turn off time max, tAOF(Max) is when the bus is in high  impedance. Both are measured from tAOFD. Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 13

    ... ODT Timing for Precharge Power‐Down Mode  Note: Both ODT to Power Down Endtry and Exit Latencies tANPD and tAXPD are not met, therefore Power‐Down Mode timings have to be applied.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 14

    ... Thermal Resistance  Theta‐ja   Package  Substrate  (Airflow = 0m/s)  60‐ball  4‐layer  84‐ball  4‐layer  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Parameter  Min.  1.7  1.7  1.7  0.49*VDDQ  0.50*VDDQ  ...

  • Page 15

    ... VID(AC) specifies the input differential voltage |VTR ‐VCP | required for switching, where VTR is the true input signal (such as CK, DQS, LDQS or UDQS) and VCP  is the complementary input signal (such as CK#, DQS#, LDQS# or UDQS#). The minimum value is equal to V IH(AC) ‐ V IL(AC).  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Parameter  ...

  • Page 16

    ... Note: Please refer to AC Overshoot and Undershoot Definition Diagram.  AC Overshoot and Undershoot Definition Diagram  DDQ Volts ( SSQ Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 V DDQ Crossing point SSQ Min.  ...

  • Page 17

    ... Input Capacitance (all other input‐only pins)  Input Capacitance Delta (all other input‐only  pins)  I/O Capacitance (DQ, DM, DQS, DQS#)  I/O Capacitance Delta (DQ, DM, DQS, DQS#)  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Parameter  Parameter  Parameter  ...

  • Page 18

    ... Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 Symbol  ...

  • Page 19

    ... SWITCHING is defined as inputs are changing between HIGH and LOW every other clock for address and control signals, and inputs changing 50% of  each data transfer for DQ signals.  3. Legend: A=Activate, RA=Read with Auto‐Precharge, D=DESELECT.    Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 19 ...

  • Page 20

    ... Note:  For operation with Tc > 85 C or Tc < 0 C, I  values may need to be derated. DD Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ‐5B  ‐37C  ‐3D  80  80  90  90  ...

  • Page 21

    ... Write DQS Low Level Width  CLK to First Rising Edge of DQS‐ In  Data‐In Setup Time to DQS‐In  (DQ, DM)  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ‐5B ‐37C DDR2‐400B  DDR2‐533C  ...

  • Page 22

    ... Minimum time clocks remains  ON after CKE asynchronously  tDELAY  drops LOW  CKE minimum high and low  pulse width  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ‐5B ‐37C DDR2‐400B  DDR2‐533C  Min  Max  Min  Max  Min  Max  Min  Max  Min  Max  ...

  • Page 23

    ... Applicable to certain temperature grades. Specified OPER (Tc and Ta) must not be violated for each temperature grade.  Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ‐ ...

  • Page 24

    ... Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 ...

  • Page 25

    ... Please contact ISSI for availability of leaded BGA options.  2. The ‐37C part is backward compatible with the slower speed grade ‐5B part. Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010  = 0°C to +70°C  ...

  • Page 26

    ... IS43/46DR86400B, IS43/46DR16320B   PACKAGE OUTLINE DRAWING 60-ball FBGA: Fine Pitch Ball Grid Array Outline (x8) Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 26 ...

  • Page 27

    ... IS43/46DR86400B, IS43/46DR16320B   PACKAGE OUTLINE DRAWING 84-ball FBGA: Fine Pitch Ball Grid Array Outline (x16) Integrated Silicon Solution, Inc. – www.issi.com – Rev. C, 8/17/2010 27 ...