m95512-r STMicroelectronics, m95512-r Datasheet
m95512-r
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m95512-r Summary of contents
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... Features Compatible with SPI bus serial interface (Positive Clock SPI modes) Single supply voltage: – 2 5.5 V for M95512-W – 1 5.5 V for M95512-R High speed – 5 MHz clock rate – Write time Status Register Hardware Protection of the Status Register Byte and Page Write (up to 128 Bytes) ...
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... Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5 Data Protection and Protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Status Register (RDSR 6.3.1 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power-up and device Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 M95512-W, M95512-R ...
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... M95512-W, M95512-R 6.3.2 6.3.3 6.3.4 6.4 Write Status Register (WRSR 6.5 Read from Memory Array (READ 6.6 Write to Memory Array (WRITE ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 26 8 Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8.1 Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8.2 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 11 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 12 Part numbering ...
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... Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 4. Status Register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 5. Protection modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 7. Operating conditions (M95512- Table 8. Operating conditions (M95512-R Table 9. AC measurement conditions Table 10. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 11. DC characteristics (M95512-W, device grade Table 12. DC characteristics (M95128- Table 13. AC characteristics (M95512-W, Device Grade Table 14 ...
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... M95512-W, M95512-R List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO and TSSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 4. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 7. Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 8. Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9 ...
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... The device is selected when Chip Select (S) is taken Low. Communications with the device can be interrupted using Hold (HOLD). In order to meet environmental requirements, ST offers the M95512-W and M95512-R in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK trademark. ECOPACK specifications are available at: www.st.com. ...
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... M95512-W, M95512-R Figure 2. SO and TSSOP connections 1. See Section 11: Package mechanical M95xxx HOLD AI01790D for package dimensions, and how to identify pin-1. Description 7/39 ...
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... During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data Input (D) and Serial Clock (C) are Don’t Care. To start the Hold condition, the device must be selected, with Chip Select (S) driven Low. 8/39 must be held stable and within the specified valid range: CC Table 11 and Table 12). These signals are described next. M95512-W, M95512 ...
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... M95512-W, M95512-R 2.6 Write Protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). This pin must be driven either High or Low, and must be stable during all write instructions. ...
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... R SDO SDI SCK SPI Memory R R Device S W HOLD Figure 3) ensures that no device is selected if the Bus requirement is met. SHCH M95512-W, M95512 SPI Memory SPI Memory R Device Device HOLD ...
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... M95512-W, M95512-R The typical value 100 k , assuming that the time constant R*C capacitance of the bus line) is short enough, as the S and C lines must reach the correct state (S = High and C = Low) while the SPI bus is in high impedance. Example pF, that is R*C p Master never leaves the SPI bus in the high impedance state for a time period shorter than 5 µ ...
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... CC CC rises from V CC via a suitable pull-up resistor. CC has reached the Power On Reset threshold voltage (this threshold is CC operating voltage defined in CC M95512-W, M95512-R CC Table 7 and During this time, the Chip SS CC voltage therefore ...
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... M95512-W, M95512-R 4.1.4 Power-down At Power-down (continuous decrease in V operating voltage to below the Power On Reset threshold voltage, the device stops responding to any instruction sent to it. During Power-down, the device must be deselected and in Standby Power mode (that is there should be no internal Write cycle in progress). Chip Select (S) should be allowed to follow the voltage applied ...
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... Read Status Register (RDSR) and Read (READ) instructions). The ‘next rising edge of Serial Clock (C)’ might (or might not) be the next bus transaction for some other device on the SPI bus. 14/39 Hold Condition Section 6.3: Read Status Register (RDSR) M95512-W, M95512-R Hold Condition AI02029D for a ...
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... M95512-W, M95512-R Table 2. Write-Protected block size Status Register Bits BP1 Protected Block BP0 0 none 1 Upper quarter 0 Upper half 1 Whole memory Operating features Array Addresses Protected none C000h - FFFFh 8000h - FFFFh 0000h - FFFFh 15/39 ...
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... Memory organization 5 Memory organization The memory is organized as shown in Figure 6. Block diagram HOLD 16/39 Figure 6. High Voltage Control Logic I/O Shift Register Address Register and Counter M95512-W, M95512-R Generator Data Register Status Register 1 Page X Decoder Size of the Read only EEPROM area AI01272C ...
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... M95512-W, M95512-R 6 Instructions Each instruction starts with a single-byte code, as summarized invalid instruction is sent (one not contained in deselects itself. Table 3. Instruction set Instruction WREN Write Enable WRDI Write Disable RDSR Read Status Register WRSR Write Status Register READ Read from Memory Array ...
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... The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events: Power-up WRDI instruction execution WRSR instruction completion WRITE instruction completion. Figure 8. Write Disable (WRDI) sequence 18/ send this instruction to the device, Chip Select (S) is driven Low Instruction High Impedance M95512-W, M95512-R 7 AI03750D ...
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... M95512-W, M95512-R 6.3 Read Status Register (RDSR) The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one of these cycles is in progress recommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...
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... Instructions Figure 9. Read Status Register (RDSR) sequence High Impedance Q 20/ Instruction Status Register Out MSB M95512-W, M95512-R Status Register Out MSB 7 AI02031E ...
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... M95512-W, M95512-R 6.4 Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded and executed, the device sets the Write Enable Latch (WEL) ...
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... The values in the BP1 and BP0 bits can be changed Status Register is Hardware write protected The values in the BP1 and (HPM) BP0 bits cannot be changed Table 4. M95512-W, M95512-R Memory content (1) Protected area Unprotected area Ready to accept Write Protected Write instructions Ready to accept Write Protected ...
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... M95512-W, M95512-R Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be entered: by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W) Low or by driving Write Protect (W) Low after setting the Status Register Write Disable (SRWD) bit. ...
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... Instruction 16-Bit Address High Impedance M95512-W, M95512-R (as specified in Table 14), at the end of Figure 13, the next byte (as specified in Table 14), at the Data Byte ...
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... M95512-W, M95512-R Figure 13. Page Write (WRITE) sequence Instruction 16-Bit Address Data Byte 2 Data Byte ...
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... It is therefore recommended to write by words of 4 bytes in order to benefit from the larger amount of Write cycles. The M95512-W and M95512-R devices are qualified at 1 million (1 000 000) Write cycles, using a cycling routine that writes to the device by multiples of 4-byte packets. ...
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... M95512-W, M95512-R 9 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability ...
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... Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 7. Operating conditions (M95512-W) Symbol V Supply voltage CC T Ambient operating temperature (Device Grade 6) A Table 8. Operating conditions (M95512-R) Symbol V Supply voltage CC T Ambient operating temperature A Table 9. AC measurement conditions Symbol C ...
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... M95512-W, M95512-R Table 11. DC characteristics (M95512-W, device grade 6) Symbol I Input leakage current LI I Output leakage current LO I Supply current (Read) CC (1) I Supply current (Write) CC0 Supply current I CC1 (Standby Power mode) V Input low voltage IL V Input high voltage IH V Output low voltage ...
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... Clock Low set-up time before HOLD not active Output disable time Clock Low to Output Valid Output Hold time Output Rise time Output Fall time HOLD High to Output Valid HOLD Low to Output High-Z Write time M95512-W, M95512-R Table 9 and Table 7 Min. Max. D. ...
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... M95512-W, M95512-R Table 14. AC characteristics (M95512-R) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH DSU t t CHDX DH t HHCH t HLCH ...
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... DC and AC parameters Figure 15. Serial input timing S tCHSL C tDVCH D Q Figure 16. Hold timing HOLD 32/39 tSLCH tCHDX tCLCH MSB IN High Impedance tHLCH tCLHL tHLQZ M95512-W, M95512-R tSHSL tCHSH tSHCH tCHCL LSB IN AI01447C tHHCH tCLHH tHHQV AI01448B ...
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... M95512-W, M95512-R Figure 17. Output timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D tCH tCLQV tQLQH tQHQL DC and AC parameters tCL tSHQZ LSB OUT AI01449e 33/39 ...
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... Typ Min Max 1.75 0.10 0.25 1.25 0.28 0.48 0.17 0.23 0.10 4.90 4.80 5.00 6.00 5.80 6.20 3.90 3.80 4.00 1.27 – – 0.25 0.50 0° 8° 0.40 1.27 1.04 M95512-W, M95512 45˚ c 0.25 mm GAUGE PLANE SO-A inches Typ Min 0.004 0.049 0.011 0.007 0.193 0.189 0.236 0.228 0.154 0.150 0.050 – 0.010 0° 0.016 0.041 Max 0.069 0.010 0.019 0.009 ...
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... M95512-W, M95512-R Figure 19. TSSOP8 – 8 lead Thin Shrink Small Outline, package outline Drawing is not to scale. Table 16. TSSOP8 – 8 lead Thin Shrink Small Outline, package mechanical data Symbol millimeters Typ ...
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... Plating technology ECOPACK® (RoHS compliant) 1. Ordering information related to the M95512-W and M95512-R identified with the process letter "A". For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Office. ...
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... and t corrected to t CHHL CHHH HHQV information clarified. Protected Table 2: Write-Protected block size. Ambient Table 6: Absolute maximum Table 11: DC 6). All values modified in (M95512-R). Document status changed to V supply voltage and V ground CC SS Section 4.1: Supply voltage (V added. (M95512-W). Capacitance. conditions. Table 12: DC characteristics Table 12: DC characteristics (M95128-R) modified ...
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... Revision history Table 18. Document revision history (continued) Date Revision 05-Jun-2007 38/39 The device endurance is specified at more than 1 000 000 (1 million) 8 cycles (corrected on page M95512-W, M95512-R Changes 1). ...
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... M95512-W, M95512-R Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...