hyb39s256400 Infineon Technologies Corporation, hyb39s256400 Datasheet - Page 15

• Manufacturer Part Number: hyb39s256400
• Description: 256 Mbit Synchronous Dram
• Manufacturer: Infineon Technologies Corporation

Burst Termination
Once a burst read or write operation has been initiated, there are several methods in which to
terminate the burst operation prematurely. These methods include using another Read or Write
Command to interrupt an existing burst operation, use a Precharge Command to interrupt a burst
cycle and close the active bank, or using the Burst Stop Command to terminate the existing burst
operation but leave the bank open for future Read or Write Commands to the same page of the
active bank. When interrupting a burst with another Read or Write Command care must be taken to
avoid DQ contention. The Burst Stop Command, however, has the fewest restrictions making it the
easiest method to use when terminating a burst operation before it has been completed. If a Burst
Stop command is issued during a burst write operation, then any residual data from the burst write
cycle will be ignored. Data that is presented on the DQ pins before the Burst Stop Command is
registered will be written to the memory.
Capacitance
T
Parameter
Input capacitance
Input capacitance
(A0-A12, BA0,BA1,RAS, CAS, WE, CS, CKE, DQM)
Input / Output capacitance
Note: Capacitance values are shown for TSOP-54 packages. Capacitance values for TFBGA packages
are lower by 0.5 pF.
INFINEON Technologies
A
= 0 to 70 °C;
V
DD,
(CLK)
V
DDQ
= 3.3 V ± 0.3 V, f = 1 MHz
(DQ)
Bank Selection by Address Bits
A10 BA0 BA1
0
0
0
0
1
0
0
1
1
x
0
1
0
1
x
15
Symbol
C
C
C
HYB39S256400/800/160DT(L)/DC(L)
I1
I2
IO
all Banks
Bank 0
Bank 1
Bank 2
Bank 3
256MBit Synchronous DRAM
min.
2.5
2.5
4.0
Values
max.
3.5
3.8
6.0
Unit
pF
pF
pF
2002-04-23