hyb39s256400dt Infineon Technologies Corporation, hyb39s256400dt Datasheet - Page 17
hyb39s256400dt
Manufacturer Part Number
hyb39s256400dt
Description
256 Mbit Synchronous Dram
Manufacturer
Infineon Technologies Corporation
Datasheet
1.HYB39S256400DT.pdf
(22 pages)
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Operating Current
One bank active, Burst length = 1
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non-Power Down Mode
No Operating Current
active state ( max. 4 banks)
Burst Operating Current
Read command cycling
Auto Refresh Current
Auto Refresh command cycling
Self Refresh Current
(standard components)
Self Refresh Mode, CKE=0.2V,
tck=infinity
Self Refresh Current
(low power components)
Self Refresh Mode, CKE=0.2V,
tck=infinity
Operating Currents
T
INFINEON Technologies
Parameter & Test Condition
Notes:
3. These parameters depend on the cycle rate. All values are measured at 166 MHz for “-6”, at 133 MHz for
4. These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3
5.
A
= 0 to 70
during tck.
and BL=4 is assumed and the VDDQ current is excluded.
t
“-7” and “-7.5” and at 100 MHz for “-8” components with the outputs open. Input signals are changed once
RFC
= t
RFC(min)
o
C; V
SS
“burst refresh”, t
= 0 V; V
DD
, V
DDQ
CKE>=VIH(min.)
CKE<=VIL(max.)
CS = VIH (min.),
CS =VIH (min.),
CKE>=Vih(min)
RFC
CKE<=Vil(max)
CS = VIH(min),
CS = VIH(min),
t
t
RFC
= 3.3 V ± 0.3 V
RC
t
RFC
Io = 0 mA
= 7.8 µs “distributed refresh”.
= t
= t
= 7.8 µs
RC(min)
RFC(min)
x8, x16
x4, x8
x16
,
17
Symb.
IDD2P
IDD2N
IDD3N
IDD3P
HYB39S256400/800/160DT(L)/DC(L)
IDD1
IDD4
IDD5
IDD6
IDD6
256MBit Synchronous DRAM
0.85
100
110
220
1.5
35
40
-6
2
5
3
3
0.85
190
1.5
-7
80
30
35
90
2
5
3
3
max.
-7.5
0.85
190
1.5
80
30
35
90
2
5
3
3
0.85
160
1.5
80
25
30
70
-8
2
5
3
3
2002-04-23
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Note
3, 4
3, 4
3
3
3
3
5