m58bw032bb STMicroelectronics, m58bw032bb Datasheet - Page 25

• Manufacturer Part Number: m58bw032bb
• Description: 32 Mbit 1mb X32, Boot Block, Burst 3.3v Supply Flash Memory
• Manufacturer: STMicroelectronics

Bit 7 of the Status Register should again be
checked to verify that the device has successfully
stored the second part of the code. When the de-
vice is ready (b7 = ‘1’), the tuning protection status
can be monitored on Status Register bit0. If b0 =
‘0’ the device is locked; b0 = ‘1’ the device is un-
locked. If the device is still locked a Read Memory
Array command must be issued before re-issuing
the Tuning Protection Unlock command.
Device locked means that the 64 bit password is
wrong. If the unlock operation is attempted using a
wrong code on an already unlocked device, the
device becomes locked. Status register bit 4 is set
to '1' if there has been a verify failure.
Tuning Protection Unlock command aborts if V
drops below V
Once the device is successfully unlocked, a Read
Memory Array command must be issued to return
the memory to read mode before issuing any other
commands. The user can then program or erase
all blocks, depending on WP and V
on the protection status of each block. At this
point, it is also possible to configure a new protec-
tion code. To write a new protection code into the
device tuning register, the user must perform the
Tuning Protection Program sequence. The device
can be re-locked with a reset or power-down.
See Appendix A, Figure 24,
ed flowcharts for using the Tuning Protection Un-
lock command.
Tuning Protection Program Command.
The Tuning Protection Program command is used
to program a new Tuning Protection Code which
can be configured by the designer of the applica-
tion (M58BW032B only). The device should be un-
locked by the Tuning Protection Unlock command
before issuing the Tuning Protection Program
command.
Read operations output the Status Register con-
tent after the program operation has started.
The Tuning Protection Code is composed of 64
bits, but the data bus is 32 bits wide so four (2 x 2)
write cycles are required to program the code.
Bit 7 of the Status Register should now be
checked to verify that the device has successfully
stored the first part of the code in the internal reg-
ister. If b7 = ‘1’, the device is ready to accept the
The third write cycle re-issues the Tuning
Protection Unlock Setup command (78h).
The fourth write cycle inputs the second 32
bits of the code at address 00001h.
The first write cycle issues the Tuning
Protection Program Setup command (48h).
The second write cycle inputs the first 32 bits
of the new tuning protection code on the data
bus, at address 00000h.
IH
or RP goes to V
25
and
M58BW032BT, M58BW032BB, M58BW032DT, M58BW032DB
IL
.
PEN
26
for suggest-
status and
PEN
second part of the code. If b7 = ‘0’, the user must
wait for this bit setting (refer to write cycle AC tim-
ings).
Bit 7 of the Status Register should again be
checked to verify that the device has successfully
stored the second part of the code. When the de-
vice is ready (b7 = ‘1’). After completion Status
Register bit 4 is set to '1' if there has been a pro-
gram failure.
Programming aborts if V
RP goes to V
A Read Memory Array command must be issued
to return the memory to read mode before issuing
any other commands. Once the code has been
changed a device reset or power-down will make
the protection active with the new code.
See Appendix A, Figure 24,
ed flowcharts for using the Tuning Protection Pro-
gram command.
Set Block Protection Configuration Register
Command
The Set Block Protection Configuration Register
command is used to configure the Block Protec-
tion Configuration Register to ‘Protected’, for a
specific block. Protected blocks are fully protected
from program or erase when WP pin is Low, V
The status of a protected block can be changed to
‘Unprotected’ by using the Clear Block Protection
Configuration Register command. At power-up, all
block are configured as ‘Protected’.
Two bus operations are required to issue a Set
Block Protection Configuration Register com-
mand:
To protect multiple blocks, the Set Block Protec-
tion Configuration Register command must be re-
peated for each block.
Any attempt to re-protect a block already protected
does not change its status.
Clear Block Protection Configuration Register
Command.
The Clear Block Protection Configuration Register
command is used to configure the Block Protec-
tion Configuration Register to ‘Unprotected’, for a
The third write cycle re-issues the Tuning
Protection Program Setup command (48h).
The fourth write cycle inputs the second 32
bits of the new code at address 00001h.
The first cycle writes the setup command
The second write cycle specifies the address
of the block to protect and confirms the
command. If the command is not confirmed,
the sequence is aborted and the device
outputs the Status Register with bits 4 and 5
set to ‘1’.
IL
.
PEN
25
drops below V
and
26
for suggest-
25/60
IH
IL
or
.