m29dw128f-70za6t Numonyx, m29dw128f-70za6t Datasheet - Page 28

• Manufacturer Part Number: m29dw128f-70za6t
• Description: 128 Mbit 16mb X8 Or 8mb X16, Multiple Bank, Page, Boot Block 3v Supply Flash Memory
• Manufacturer: Numonyx

Command interface
6.1.3
6.1.4
6.1.5
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Read CFI Query command
The Read CFI Query Command is used to put the addressed bank in Read CFI Query
mode. Once in Read CFI Query mode Bus Read operations to the same bank will output
data from the Common Flash Interface (CFI) Memory Area. If the read operations are to a
different bank from the one specified in the command then the read operations will output
the contents of the memory array and not the CFI data.
One Bus Write cycle is required to issue the Read CFI Query Command. Care must be
taken to issue the command to one of the banks (A22-A19) along with the address shown in
Table 3
same bank (A22-A19) to the addresses shown in
(CFI)
This command is valid only when the device is in the Read Array or Auto Select mode. To
enter Read CFI query mode from Auto Select mode, the Read CFI Query command must
be issued to the same bank address as the Auto Select command, otherwise the device will
not enter Read CFI Query mode.
The Read/Reset command must be issued to return the device to the previous mode (the
Read Array mode or Auto Select mode). A second Read/Reset command is required to put
the device in Read Array mode from Auto Select mode.
See
the information contained in the Common Flash Interface (CFI) memory area.
Blank Verify command
The Blank Verify command is used to check if a block is blank or in other words, if it has
been successfully erased and all its bits set to '1'. Three cycles are required to issue a Verify
command:
1.
2.
3.
After the Blank Verify command has completed, the memory returns to Read mode, unless
an error has occurred. When an error occurs, the memory continues to output the Status
Register. A Read/Reset command must be issued to reset the error condition and return to
Read mode.F
Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations
are required to issue the Chip Erase Command and start the Program/Erase Controller.
If any blocks are protected, then these are ignored and all the other blocks are erased. If all
of the blocks are protected the Chip Erase operation appears to start but will terminate
within about 100µs, leaving the data unchanged. No error condition is given when protected
blocks are ignored.
During the erase operation the memory will ignore all commands, including the Erase
Suspend command. It is not possible to issue any command to abort the operation. Typical
chip erase times are given in
Appendix B
The command starts with two unlock cycles.
The third bus write cycle sets up the Verify command code along with the address of
the block to be checked.
Bus Read operations during the Blank Verify operation output the Status Register on
Data Inputs/Outputs (see
(A7-A0), will read from the Common Flash Interface Memory Area.
and
Table 6
,
Table 35
. Once the command is issued subsequent Bus Read operations in the
,
Table 36
Table 18
7: Status Register
,
Table 37
. All Bus Read operations during the Chip Erase
,
Table 38
).
Appendix B: Common Flash Interface
,
Table 39
and
Table 40
M29DW128F
for details on