m29dw128g60nf6e Numonyx, m29dw128g60nf6e Datasheet
m29dw128g60nf6e
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m29dw128g60nf6e Summary of contents
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... Extra block (128-word factory locked and 128-word customer lockable) used as security block or to store additional information Electronic signature – Manufacturer code: 0020h – Device code: 227Eh+2220h+2202h ECOPACK Rev 3 M29DW128G 3 V supply flash memory TSOP56 (NF BGA TBGA64 (ZA ® packages available www.numonyx.com 1/85 1 ...
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... Bus write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 Output disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.5 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.6 Automatic standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 Auto select mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.0.1 4.0.2 4.0.3 5 Hardware protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1 Write protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 Software protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 Volatile protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/85 WP PP/ supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Read electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Verify extended memory block protection indicator . . . . . . . . . . . . . . . . 18 Verify block protection status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 M29DW128G ...
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... Unlock Bypass Write to Buffer Program command . . . . . . . . . . . . . . . . 34 Unlock Bypass Enhanced Buffered Program command . . . . . . . . . . . . 34 Unlock Bypass CFI command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Unlock Bypass Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Enter Extended Memory Block command . . . . . . . . . . . . . . . . . . . . . . . 36 Exit Extended Memory Block command . . . . . . . . . . . . . . . . . . . . . . . . 37 Lock register command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Password protection mode command set . . . . . . . . . . . . . . . . . . . . . . . 37 Non-volatile protection mode command set . . . . . . . . . . . . . . . . . . . . . . 38 Contents ...
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... DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 12 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 13 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Appendix A Block addresses and read/modify protection groups . . . . . . . . . . 69 Appendix B Common flash interface (CFI Appendix C Extended memory block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 C.1 Factory locked section of extended memory block . . . . . . . . . . . . . . . . . . 78 C.2 Customer lockable section of extended memory block . . . . . . . . . . . . . . . 79 Appendix D Flowcharts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 4/85 NVPB lock bit command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Volatile protection mode command set ...
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M29DW128G 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Table 32. Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 33. CFI query identification string . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 34. CFI query system interface information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 35. Device geometry definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Table 36. Primary algorithm-specific extended query table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Table 37. Security code area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Table 38. Extended memory block address and data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Table 39. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6/85 M29DW128G ...
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M29DW128G List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Non-volatile protection – Password protection Additional protection features are available upon customer request. The memory is offered in TSOP56 ( mm) and TBGA64 ( mm pitch) packages. The memory is delivered with all the bits erased (set to ‘1’). 8/85 Table 2. Four of the parameter blocks are at the top ...
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M29DW128G Table 1. Signal names Signal name A0-A22 DQ0-DQ15 CCQ V / Figure 1. Logic diagram Table 2. Bank architecture Bank Bank size A 16 Mbit B 48 ...
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Description Figure 2. TSOP connections 10/ A22 A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 M29DW128G 15 A21 V PP /WP RB A18 A17 ...
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M29DW128G Figure 3. TBGA connections (top view through package CCQ A17 A18 NC A1 ...
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Description Figure 4. Block addresses 000000h 32 Kwords 007FFFh 018000h 32 Kwords 01FFFFh Bank A 020000h 128 Kwords 03FFFFh 0E0000h 128 Kwords 0FFFFFh 100000h 128 Kwords 11FFFFh Bank B 3E0000h 128 Kwords 3FFFFFh 12/85 Address lines A22-A0 400000h 41FFFFh Total ...
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... During bus write operations the command register does not use DQ8-DQ15 bits that should be also ignored when reading the status register. 2.3 Chip Enable (E) The Chip Enable pin, E, activates the memory, allowing bus read and bus write operations to be performed. When chip enable is High, V 2.4 Output Enable (G) The Output Enable pin, G, controls the bus read operation of the memory ...
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... Figure 19: Accelerated program timing Never raise V /write protect memory may be left in an indeterminate state. A 0.1 µF capacitor should be connected between the V PP from the power supply. The PCB track widths must be sufficient to carry the currents required during unlock bypass program (see I characteristics) ...
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... This prevents bus write operations from accidentally damaging the data LKO during power-up, power-down and power surges. If the program/erase controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1 µF capacitor should be connected between the V ground pin to decouple the current surges from the power supply ...
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... While programming or erasing in one bank, read operations are possible in any of the other banks. Write operations are only allowed in one bank at a time. See Table 4: Bus operations enable, write enable, and reset pins are ignored by the memory and do not affect bus operations. 3.1 Bus read Bus read operations read from the memory cells, or specific registers in the command interface ...
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... During program or erase operations the memory will continue to use the program/erase supply current, I CC3 3.5 Reset During reset mode the memory is deselected and the outputs are high impedance. The memory is in reset mode when standby level, independently from the Chip Enable, Output Enable or Write Enable inputs. 3.6 Automatic standby Automatic standby allows the memory to achieve low power consumption during read mode ...
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... The protection status of the extended memory block (factory locked or customer lockable) can be accessed by reading the extended memory block protection indicator (see Block protection). The protection status of the extended memory block is then output on bit DQ7 of the data input/outputs (see 4.0.3 Verify block protection status ...
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... Device code (cycle BKA bank address Table 6. Block protection V Operation (1) WP Verify extended memory block indicator bit Verify block protection status BAd any address in the block, BKA bank address. ...
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... The non-volatile and password protection modes provide non-volatile protection. Volatilely protected blocks and non-volatilely protected blocks can co-exist within the memory array. However, the volatile protection only control the protection scheme for blocks that are not protected using the non-volatile or password protection ...
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M29DW128G If the user attempts to program or erase a protected block, the device ignores the command and returns to read mode. The device is shipped with all blocks unprotected. The block protection status can be read either by performing ...
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Software protection If one of the non-volatile protected blocks needs to be unprotected (corresponding NVPB set to ‘1’), a few more steps are required: 1. First, the NVPB lock bit must be cleared by either putting the device through a ...
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M29DW128G programmed it cannot be erased, the device permanently remains in password protection mode, and the 64-bit password can neither be retrieved nor reprogrammed. Moreover, all commands to the address where the password is stored, are disabled. Refer to Table ...
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... The Read/Reset command can be issued, between bus write cycles before the start of a program or erase operation, to return the device to read mode. If the Read/Reset command is issued during the timeout of a block erase operation, the memory will take µs to abort. During the abort period no valid data can be read from the memory. ...
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... The Read CFI Query command is used to put the memory in read CFI query mode. Once in read CFI query mode, bus read operations to the memory will output data from the common flash interface (CFI) memory area ...
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... The Read/Reset command must be issued to return the device to read array mode before the Resume command will be accepted. During erase suspend a bus read operation to the extended memory block will output the extended memory block data. Once in the extended block mode, the Exit Extended Block command must be issued before the erase operation can be resumed ...
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... The Program Suspend command may also be issued during a program operation while an erase is suspended. In this case, data may be read from any addresses not in Erase Suspend or Program Suspend read is needed from the extended memory block area (one-time program area), the user must use the proper command sequences to enter and exit this region ...
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... Program command The Program command can be used to program a value to one address in the memory array at a time. The command requires four bus write operations, the final write operation latches the address and data in the internal state machine and starts the program/erase controller. ...
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... M29DW128G Table 8. Standard commands Command 1 Read/Reset 3 Manufacturer code Device code Extended memory Auto 3 block protection Select indicator Block protection status (4) Program 4 Chip Erase 6 Block Erase 6+ Erase/Program Suspend 1 Erase/Program Resume 1 Read CFI Query don’t care, PA program address, PD program data, BAd any address in the block, BKA bank address. All values in the table are in hexadecimal ...
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... Section 7.1.9: Program Resume After the fast program operation has completed, the memory will return to the read mode, unless an error has occurred. When an error occurs bus read operations to the memory will continue to output the status register. A Read/Reset command must be issued to reset the error condition and return to read mode. One of the erase commands must be used to set all the bits in a block or in the whole memory from ’ ...
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... It is possible to detect program operation fails when changing programmed data from ‘0’ to ‘1’, that is when reprogramming data in a portion of memory already programmed. The resulting data will be the logical OR between the previous value and the current value. ...
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... An external supply (12 V) can be used to improve programming efficiency possible to detect program operation fails when changing programmed data from ‘0’ to ‘1’, that is when reprogramming data in a portion of memory already programmed. The resulting data will be the logical OR between the previous and the current value. ...
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... The Unlock Bypass Enhanced Buffered Program command can be issued to speed up programming operation The Unlock Bypass CFI command can be issued to read the CFI when the memory is in the unlock bypass mode The Unlock Bypass Reset command can be issued to return the memory to read mode. ...
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... Unlock Bypass Chip Erase command The Unlock Bypass Chip Erase command can be used to erase all memory blocks at a time. The command requires two bus write operations only instead of six using the standard Chip Erase command. The final bus write operation starts the program/erase controller. ...
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... Unlock Bypass CFI command The Unlock Bypass CFI command allows to use any address in the bank to perform a CFI query when the memory is in the unlock bypass mode. 7.2.13 Unlock Bypass Reset command The Unlock Bypass Reset command can be used to return to read/reset mode from unlock bypass mode ...
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... The M29DW128G has one extra 256-word block (extended memory block) that can only be accessed using the Enter Extended Memory Block command. The extended memory block is divided in two memory areas of 128 words each: the first one is factory locked and the second one is customer lockable. ...
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... Exit Extended Memory Block command The Exit Extended Memory Block command is used to exit from the extended memory block mode and return the device to read mode. Four bus write operations are required to issue the command. 7.3.3 Lock register command set The M29DW128G offers a set of commands to access the lock register and to configure and verify its content ...
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Command interface Once password program operation has completed, an Exit Protection Command Set command must be issued to return the device to read mode. The password protection mode can then be selected. By default, all password bits are set to ...
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M29DW128G Figure 6. NVPB program/erase algorithm Enter NVPB command set. Program NVPB Addr = BAd Read Byte twice Addr = BAd NO DQ6= Toggle YES NO DQ5=1 Wait 500 µs YES Read Byte twice Addr = BAd NO Read Byte ...
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Command interface 7.3.6 NVPB lock bit command set Enter NVPB Lock Bit Command Set command Three bus write cycles are required to issue the Enter NVPB Lock Bit Command Set command. Once the command has been issued, the commands allowing ...
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M29DW128G Table 11. Block protection commands Command Enter Lock Register 3 555 (4) Command Set Lock Register Program 2 Lock Register Read 1 Enter Password Protection 3 555 (4) Command Set (6)(7) Password Program 2 Password Read 4 (7) Password ...
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Command interface Table 12. Program, erase times and program, erase endurance cycles Parameter Chip Erase (4) Block Erase (128 kwords) Erase Suspend latency time Block Erase timeout Single Word Program Word Program Write to Buffer Program (32 words at-a-time) Chip ...
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... DQ0, to ‘0’. However, this bit is one-time programmable and once protected the extended memory block cannot be unprotected. The extended memory block protection status can be read in auto select mode by issuing an Auto Select command (see Table 14: Block protection status) bits ...
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Registers 8.1.5 DQ15 to DQ5 and DQ3 reserved They are ‘don’t care’. Table 13. Lock register bits DQ15-5 DQ4 Volatile lock Don’t care Don’t care boot bit 1. DQ0, DQ1, DQ2 and DQ4 are set to ‘1’ when shipped from ...
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M29DW128G Figure 7. Lock register program flowchart Write Lock Register Exit command: Device returned Add Dont' care, Data 90h to Read mode Add Dont' care, Data 00h the programmed data (see 2. The lock register can only ...
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... The error bit can be used to identify errors detected by the program/erase controller. The error bit is set to ’1’ when a program, block erase or chip erase operation fails to write the correct data to the memory. If the error bit is set a Read/Reset command must be issued 46/85 Table 15: Status register flowchart, gives an example of how to use the data polling bit ...
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... Note that the Program command cannot change a bit set to ’0’ back to ’1’ and attempting will set DQ5 to ‘1’. A bus read operation to that address will show the bit is still ‘0’. One of the erase commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. ...
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Registers Table 15. Status register bits Operation (2) Program Program During Erase Suspend Bank address DQ7 Buffered Program Abort Program Error Chip Erase Block Erase before timeout Block Erase Erase Suspend Erase Error 1. Unspecified data bits should be ignored. ...
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M29DW128G Figure 8. Data polling flowchart START READ DQ5 & DQ7 at VALID ADDRESS DQ7 YES = DATA NO NO DQ5 = 1 YES READ DQ7 at VALID ADDRESS DQ7 YES = DATA NO FAIL PASS AI07760 Registers 49/85 ...
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Registers Figure 9. Data toggle flowchart 1. BKA=bank address being programmed or erased. 50/85 START READ DQ6 ADDRESS = BKA READ DQ5 & DQ6 ADDRESS = BKA DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 TWICE ...
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... Dual operations and multiple bank architecture The multiple bank architecture of the M29DW128G gives greater flexibility for software developers to split the code and data spaces within the memory array. The dual operations feature simplifies the software management of the device by allowing code to be executed from one bank while another bank is being programmed or erased ...
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Dual operations and multiple bank architecture Table 17. Dual operations allowed in same bank Read Status of Status bank Read Register (1) Idle Yes Yes Programming No Yes Erasing No Yes Program Yes No suspended Erase (6) Yes Yes suspended ...
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M29DW128G 10 Maximum ratings Stressing the device above the rating listed in cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. These are stress ratings only and operation of the ...
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DC and AC parameters 11 DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests ...
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M29DW128G Table 20. Power-up waiting timings Symbol ( High to Chip Enable Low VCHEL CC ( High to Chip Enable Low VCQHEL CCQ t V High to Write Enable Low VCHWL High to ...
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DC and AC parameters Table 21. Device capacitance Symbol Parameter C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 22. DC characteristics Symbol Parameter (1) I Input leakage current LI I Output leakage current ...
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M29DW128G Figure 13. Random read AC waveforms A0-A22 E G DQ0-DQ15 BYTE tELBL/tELBH tAVAV VALID tAVQV tELQV tELQX tGLQX tGLQV tBHQV tBLQZ DC and AC parameters tAXQX tEHQX tEHQZ tGHQX tGHQZ VALID AI13698b 57/85 ...
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DC and AC parameters Figure 14. Page read AC waveforms 58/85 M29DW128G ...
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M29DW128G Table 23. Read AC characteristics Symbol Alt. Parameter Address Valid to Next t t AVAV RC Address Valid Address Valid to Output t t AVQV ACC Valid Address Valid to Output t t AVQV1 PAGE Valid (Page) Chip Enable ...
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... DOUT, programmed by the previous Program command the address of the memory location to be programmed the data to be programmed. 3. DQ7 is the complement of the data bit being programmed to DQ7 (see 4 ...
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M29DW128G Table 24. Write AC characteristics, write enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Chip Enable Low to Write Enable Low ELWL Write Enable Low to Write Enable ...
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... Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check of status register data polling bit the address of the memory location to be programmed the data to be programmed. 3. DQ7 is the complement of the data bit being programmed to DQ7 (see 4 ...
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M29DW128G Figure 17. Reset AC waveforms (no program/erase ongoing tPLPX Figure 18. Reset during program/erase operation AC waveforms Table 26. Reset AC characteristics Symbol Alt. ( Low ...
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DC and AC parameters Figure 19. Accelerated program timing waveforms V PPH tVHVPP Figure 20. Data polling AC waveforms tWHEH DQ7 DATA DQ6-DQ0 DATA R/B 1. DQ7 returns valid ...
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M29DW128G Table 27. Accelerated program and data polling/data toggle AC characteristics Symbol Alt /WP raising and falling time VHVPP PP Address setup time to Output Enable Low during t t AXGL ASO toggle bit polling t Address hold ...
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... Package mechanical 12 Package mechanical To meet environmental requirements, Numonyx offers the M29DW128G in ECOPACK packages. ECOPACK packages are lead-free. The category of second level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. Figure 21. TSOP56 – ...
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M29DW128G Figure 22. TBGA64 active ball array pitch, package outline E BALL "A1" 1. Drawing is not to scale. Table 29. TBGA64 ...
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... This product is also available with the extended block factory locked. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest Numonyx sales office. 68/85 =1. ...
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M29DW128G Appendix A Block addresses and read/modify protection groups Table 31. Block addresses Bank Block Protection group 0 Protection group 1 Protection group 2 Protection group 3 Protection group 4 Protection group Bank A 5 Protection group 6 Protection group ...
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Block addresses and read/modify protection groups Table 31. Block addresses (continued) Bank Block Protection group 11 Protection group 12 Protection group 13 Protection group 14 Protection group 15 Protection group 16 Protection group 17 Protection group 18 Protection group 19 ...
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M29DW128G Table 31. Block addresses (continued) Bank Block Protection group 35 Protection group 36 Protection group 37 Protection group 38 Protection group 39 Protection group 40 Protection group 41 Protection group 42 Protection group 43 Protection group 44 Protection group ...
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Block addresses and read/modify protection groups Table 31. Block addresses (continued) Bank Block Protection group 59 Protection group 60 Protection group 61 Protection group 62 Protection group 63 Protection group Bank D 64 Protection group 65 Protection group 66 Protection ...
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... The CFI data structure also contains a security area where a 64-bit unique security number is written (see only in read mode by the final user impossible to change the security number after it has been written by Numonyx. Table 32. Query structure overview ...
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Common flash interface (CFI) Table 34. CFI query system interface information Address Data V CC 1Bh 0027h bit value in volts bit value in 100 1Ch 0036h bit 7 to 4BCD ...
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M29DW128G Table 35. Device geometry definition Address Data 27h 0018h Device size = 2 28h 0001h Flash device interface code description 29h 0000h 2Ah 0006h Maximum number of bytes in multiple-byte program or page= 2 2Bh 0000h Number of erase ...
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... Program suspend not supported supported 51h 0001h Unlock bypass not supported supported 52h 0008h Extended memory block size (customer lockable), 2 57h 0004h Bank organization data at 4Ah bank number 58h 000Bh Bank A information number of blocks in bank A 59h 0018h ...
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M29DW128G Table 37. Security code area Address Data 61h XXXX 62h XXXX 63h XXXX 64h XXXX Common flash interface (CFI) Description XXXX XXXX 64 bit: unique device number XXXX XXXX Value 77/85 ...
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... Its status is indicated by bit DQ6 and DQ7. When DQ7 is set to ‘1’ and DQ6 to ‘0’, it indicates that this second memory area is customer lockable. When DQ7 and DQ6 are both set to ‘1’, it indicates that the second part of the extended memory block is customer locked and protected from program operations. ...
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... DQ7 and DQ6 are set to '1' and '0' respectively the customer to program and protect this section of the extended memory block but care must be taken because the protection is not reversible. This section can be protected by setting the extended memory block protection bit, DQ0, to ‘0’. ...
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Flowcharts Appendix D Flowcharts Figure 23. Write to buffer program flowchart and pseudocode 1. n+1 is the number of addresses to be programmed. 80/85 Start Write to Buffer command, block address (1) Write n , block address Write Buffer Data, ...
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M29DW128G 2. A write to buffer program abort and reset must be issued to return the device in read mode. 3. When the block address is specified, any address in the selected block address space is acceptable. However when loading ...
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Flowcharts Figure 24. Enhanced buffered program flowchart and pseudocode NO DQ1 = 1 YES 1. A buffered program abort and reset must be issued to return the device in read mode. 2. When the block address is specified, all the ...
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M29DW128G Buffered Program Abort and Reset command if the operation aborted. 5. See Table 10: Enhanced buffered program commands, for details on Enhanced Buffered Program command sequence. Flowcharts 83/85 ...
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... Figure 12: Power-up waiting timings waiting timings. Added t and t timings in PHWL RHWL 2 Figure 17: Reset AC waveforms (no program/erase Figure 18: Reset during program/erase operation AC Applied Numonyx branding. Modified: Table 6: Block protection 3 C: Extended memory block. Minor text changes. M29DW128G Revision details and Table 20: Power-up Table 26: Reset AC ...
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... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...