m29dw128g60nf6e Numonyx, m29dw128g60nf6e Datasheet - Page 15

• Manufacturer Part Number: m29dw128g60nf6e
• Description: 128-mbit 8 Mbit X16, Multiple Bank, Page, Dual Boot 3 V Supply Flash Memory
• Manufacturer: Numonyx

M29DW128G
2.9
2.10
2.11
After a hardware reset, bus read and bus write operations cannot begin until ready/busy
becomes high-impedance. See
Figure
The use of an open-drain output allows the ready/busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
V
V
The command interface is disabled when the V
voltage, V
during power-up, power-down and power surges. If the program/erase controller is
programming or erasing during this time then the operation aborts and the memory contents
being altered will be invalid.
A 0.1 µF capacitor should be connected between the V
ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during program and erase operations (see
I
V
V
independently from V
V
V
which must be connected to the system ground.
CC1
CC
CCQ
SS
CC
CCQ
ss
, I
is the reference for all voltage measurements. The device features two V
provides the power supply for all operations (read, program and erase).
ground
CC2
provides the power supply to the I/O pins and enables all outputs to be powered
supply voltage
18.
input/output supply voltage
, I
LKO
CC3
. This prevents bus write operations from accidentally damaging the data
in
Table 22: DC
CC
.
Table 26: Reset AC
characteristics).
CC
supply voltage is less than the lockout
characteristics,
CC
supply voltage pin and the V
Figure 17
Signal descriptions
SS
and
pins both of
15/85
SS