lh5164avh Sharp Microelectronics of the Americas, lh5164avh Datasheet

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lh5164avh

Manufacturer Part Number
lh5164avh
Description
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LH5164AVH
FEATURES
DESCRIPTION
8,192
process technology.
The LH5164AVH is a static RAM organized as
8,192
Access time: 200 ns (MAX.)
Supply current (MAX.):
Low voltage operation: 3.3 V 0.3 V
Fully-static operation
TTL compatible I/O
Three-state outputs
Packages:
Operating: 90 mW
Standby: 3.6 W (MAX.) @ 70 C
Data retention:
28-pin, 450-mil SOP
28-pin, 8
29 mW (t
0.6 W (V
8 bits. It is fabricated using silicon-gate CMOS
8 bit organization
10.8 W (MAX.) @ 85 C
RC
13 mm
CC
, t
= 3 V, t
WC
2
= 1 s)
TSOP (Type I)
A
= 25 C)
PIN CONNECTIONS
28-PIN TSOP (Type I)
28-PIN SOP
Figure 2. Pin Connections for TSOP Package
Figure 1. Pin Connections for SOP Package
CE
WE
V
A
A
NC
OE
A
A
A
A
A
A
A
CC
12
11
9
8
2
7
5
4
3
6
10
12
13
14
11
CMOS 64K (8K
2
3
4
5
6
7
8
9
1
GND
I/O
I/O
I/O
A
NC
A
A
A
A
A
A
A
A
12
7
6
4
3
2
0
1
2
3
5
1
10
12
13
14
11
2
3
4
6
7
8
9
5
1
27
18
17
28
26
25
24
23
22
21
20
19
16
15
8) Static RAM
A
I/O
I/O
I/O
I/O
CE
A
A
OE
A
CE
I/O
V
WE
8
9
11
CC
10
7
6
5
4
2
8
1
16
28
27
26
25
24
23
22
20
19
18
17
15
21
TOP VIEW
TOP VIEW
I/O
I/O
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
5164AVH-2
5164AVH-1
A
A
A
A
10
0
1
2
2
8
3
7
6
5
4
1
1
1

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lh5164avh Summary of contents

Page 1

... TTL compatible I/O Three-state outputs Packages: 28-pin, 450-mil SOP 2 28-pin TSOP (Type I) DESCRIPTION The LH5164AVH is a static RAM organized as 8,192 8 bits fabricated using silicon-gate CMOS process technology. PIN CONNECTIONS 28-PIN SOP = 25 C) Figure 1. Pin Connections for SOP Package 28-PIN TSOP (Type I) ...

Page 2

... Write Enable input OE Output Enable input 2 MEMORY ARRAY (256 x 256) COLUMN I/O CIRCUITS COLUMN SELECT Figure 3. LH5164AVH Block Diagram SIGNAL I GND NC CMOS 64K (8K 8) Static RAM GND 5164AVH-3 PIN NAME Data inputs and outputs ...

Page 3

... C CE2 0 – 500 –500 – 0 LH5164AVH SUPPLY CURRENT NOTE Standby ( Operating ( Operating ( Operating ( NOTE UNIT NOTE MIN. MAX. UNIT –1.0 1 ...

Page 4

... LH5164AVH READ CYCLE (T = – + PARAMETER SYMBOL Read cycle time Address access time CE access time 1 CE access time 2 Output enable access time Output hold time CE Low to output in Low High to output in Low Low to output in Low-Z CE High to output in High-Z ...

Page 5

... CCDR t CDR t R DATA RETENTION MODE t CDR 0 CCDR DATA RETENTION MODE t CDR CE 0 fix the input level of CE between 1 2 Figure 4. Data Retention Characteristics LH5164AVH MIN. MAX. UNIT 2 0 0 NOTE 1 ...

Page 6

... LH5164AVH OUT NOTE 'HIGH ACE1 t LZ1 t ACE2 t LZ2 OLZ DATA VALID Figure 5. Read Cycle CMOS 64K (8K 8) Static RAM t HZ1 t HZ2 t OHZ t OH 5164AVH-4 ...

Page 7

... When I/O pins are in the output state, input signals with the opposite logic level must not be applied (NOTE (NOTE 3) (NOTE 4) t OHZ (NOTE 5) LOW transition 'LOW 'HIGH,' and WE = 'LOW Figure 6. Write Cycle (OE Controlled) LH5164AVH t WR (NOTE DATA VALID 5164AVH-5 7 ...

Page 8

... LH5164AVH OUT D IN NOTES defined as the time from the last occuring transition, either the time when the writing is finished defined as the time from writing finish to address change defined as the time from address change to writing start. ...

Page 9

... PACKAGE DIAGRAMS 28SOP (SOP028-P-0450) 1.27 [0.050] TYP. 0.50 [0.020] 0.30 [0.012 18.20 [0.717] 17.80 [0.701] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 1.70 [0.067] 15 8.80 [0.346] 12.40 [0.488] 8.40 [0.331] 11.60 [0.457] 14 1.70 [0.067] 0.15 [0.006] 1.025 [0.040] 2.40 [0.094] 2.00 [0.079] 0.20 [0.008] 0.00 [0.000] 1.025 [0.040] 28-pin, 450-mil SOP LH5164AVH 10.60 [0.417] 0.20 [0.008] 0.10 [0.004] 28SOP 9 ...

Page 10

... TYP 8.20 [0.323] 7.80 [0.307] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5164AVH X Device Type Package Example: LH5164AVHN (CMOS 64K ( Static RAM, 28-pin, 450-mil SOP 12.00 [0.472] 13.70 [0.539] 11.60 [0.457] 13.10 [0.516] 14 0.15 [0.006] 1.10 [0.043] 0.90 [0.035] 1.20 [0.047] MAX. 0.425 [0.017] 0.425 [0.017] ...

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