tc58dvm92a1fti0 TOSHIBA Semiconductor CORPORATION, tc58dvm92a1fti0 Datasheet - Page 28
tc58dvm92a1fti0
Manufacturer Part Number
tc58dvm92a1fti0
Description
512-mbit 64m U 8 Bits Cmos Nand E2 Prom
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC58DVM92A1FTI0.pdf
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31 times with incrementing the page address in the blocks, and then input the last page data of the blocks,
“10H” command executes final programming.
command.
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
Starting the above operation from 1st page of the selected erase blocks, and then repeating the operation total
In this full sequence, the command sequence is following.
After the “10H” command, the total results of the above operation is shown through the Status Read
The Status discription of 71H command is following.
RY
32nd
31st
1st
/
BY
80
80
80
80
District 0 Pass/Fail
District 1 Pass/Fail
District 2 Pass/Fail
District 3 Pass/Fail
Total Pass/Fail
Write Protect
Ready/Busy
Not Used
STATUS
10
11
11
11
11
80
80
80
80
Pass: 0
Pass: 0
Pass: 0
Pass: 0
Pass: 0
Do not care
Ready: 1
Protect: 0
Status Read
command
71
11
11
11
11
OUTPUT
Fail: 1
Fail: 1
Fail: 1
Fail: 1
Fail: 1
Busy: 0
Not Protect: 1
80
80
80
80
I/O
Fail
Pass
If at least one fail occurred in 32 times u 4
(512 16 byte) page write operation, it
shows “Fail” condition.
more than one fail occurred in 32 times
(512 16 byte) page write operation in
District 0 area, it shows “Fail” condition.
as I/O2.
11
11
11
11
I/O1 describes total Pass/Fail condition.
I/O2 describes Pass/Fail condition. If
I/O3, I/O4 and I/O5 are as same manner
TC58DVM92A1FTI0
80
80
80
80
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