tc58dvm92a5tai0 TOSHIBA Semiconductor CORPORATION, tc58dvm92a5tai0 Datasheet - Page 21

• Manufacturer Part Number: tc58dvm92a5tai0
• Description: 512-mbit 64m ? 8 Bits Cmos Nand E Prom Description
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RY
CLE
ALE
Read Mode (3)
16-byte redundancy area of the page. The start pointer is therefore set to a value between byte 512 and byte
527.
Sequential Read (1) (2) (3)
Read mode (3) outputs the contents of the redundant address locations only.
/
WE
RE
CE
BY
I/O
Read mode (3) has the same timing as Read modes (1) and (2), but it is used to access information in the extra
This mode allows the sequential reading of pages without additional address input.
Sequential Read modes (1) and (2) output the contents of addresses 0 to 527 as shown above, while Sequential
RY
00h
01h
50h
/
BY
50h
Figure 4. Read mode (3) operation
(00h)
0
Sequential Read (1)
Address input
A
512
527
A0 to A3
Busy
t
R
527
(01h)
Sequential Read (2)
Data output
Busy
21
A
Addresses bits A0 to A3 are used to set the start pointer for the
redundant memory cells, while A4 to A7 are ignored.
Once a 50h command has been issued, the pointer moves to the
redundant cell locations and only those 16 cells can be
addressed, regardless of the value of the A4 to A7 address. (An
00h or an 01h command is necessary to move the pointer back to
the 0 to 511 main memory cell location.)
527
Busy
t
R
Data output
(50h)
Sequential Read (3)
TC58DVM92A5TAI0
512 527
A
Busy
t
R
2010-04-23