tc58dvm92a5baj3 TOSHIBA Semiconductor CORPORATION, tc58dvm92a5baj3 Datasheet - Page 24

• Manufacturer Part Number: tc58dvm92a5baj3
• Description: 512-mbit 64m ? 8 Bits Cmos Nand E Prom Description
• Manufacturer: TOSHIBA Semiconductor CORPORATION

APPLICATION NOTES AND COMMENTS
(1)
(2)
(3)
(4)
CE , WE , RE
Power-on/off sequence:
sequence is necessary.
power up sequence.
In order to operate this device stably, after V
Status after power-on
Prohibition of unspecified commands
prohibited. Stored data may be corrupted if an unknown command is entered during the command cycle.
Restriction of command while Busy state
Ready/Busy
The WP signal is useful for protecting against data corruption at power-on/off. The following timing
The WP signal may be negated any time after the V
CLE, ALE
The following sequence is necessary because some input signals may not be stable at power-on.
The operation commands are listed in Table 4. Input of a command other than those specified in Table 4 is
During Busy state, do not input any command except 70h and FFh.
WP
0 V
V
CC
Invalid
Power on
Don’t
V
care
100 µ s max
IL
2.5 V
2.7 V
1ms max
Figure 14.
Reset
FF
Figure 13. Power-on/off Sequence
CC
becomes 2.5V, it should begin access after about 1ms.
24
V
IH
Operation
CC
reaches 2.5 V and CE signal is kept high in
TC58DVM92A5BAJ3
Don’t
Don’t
care
care
V
IL
2010-06-16