lt3641 Linear Technology Corporation, lt3641 Datasheet

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lt3641

Manufacturer Part Number
lt3641
Description
Dual Monolithic Buck Regulator With Power-on Reset And Watchdog Timer
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS
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L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
TYPICAL APPLICATION
V
FEATURES
OUT1
7V TO 42V*
High Voltage Buck Regulator:
Input Transient Protection to 55V
Low Voltage Synchronous Buck Regulator:
Synchronizable, Adjustable 350kHz to 2.5MHz
Switching Frequency
Programmable Power-On Reset Timer
Programmable Window Mode Watchdog Timer
Typical Quiescent Current: 290μA
Short-Circuit Robust
Programmable Soft-Start
Low Shutdown Current: I
Thermal Shutdown
Available in Thermally Enhanced 28-Lead
(4mm × 5mm) QFN and 28-Lead TSSOP Packages
Industrial Power Supplies
Automotive Electronic Control Units
μP
4V to 42V Operating Range
1.3A Output Current
2.5V to 5.5V Input Voltage Range
1.1A Output Current
2MHz 5V/0.8A and 3.3V/0.5A Step Down Regulators
100k
V
IN
1.5nF
100k
* FOR INPUT VOLTAGES ABOVE 42V RESTRICTIONS APPLY
10μF
SYNC
WDE
PGOOD2
RST1
RST2
WDO
WDI
CWDT
EN/UVLO V
CPOR
32.4k
1.5nF
IN
LT3641
RT GND SS2
SW
0.22μF
Q
BST
1nF
< 1μA
SW1
SW2
V
EN2
FB1
FB2
SS1
IN2
DA
1nF
4.7μH
2.2μH
49.9k
301k
100k
226k
3641 TA01a
22μF
V
5V/0.8A
22μF
V
3.3V/0.5A
OUT1
OUT2
Reset and Watchdog Timer
90
85
70
80
75
DESCRIPTION
The LT
switching regulator with a power-on reset and a watchdog
timer. Both regulators are synchronized to a single oscillator
with an adjustable frequency (350kHz to 2.5MHz). At light
loads, both regulators operate in low ripple Burst Mode
to maintain high effi ciency and low output ripple.
The high voltage channel is a nonsynchronous buck with
an internal 2.4A top switch that operates from an input
of 4V to 42V and input transient protection to 55V. The
low voltage channel operates from an input of 2.5V to
5.5V. Internal synchronous power switches provide high
effi ciency without the need of external Schottky diode.
Both channels have cycle-by-cycle current limit, providing
protection against shorted outputs.
The power-on reset and watchdog timeout periods are
both adjustable using external capacitors. The window
mode watchdog timer fl ags when the μP pulses group
too close together or too far apart.
The LT3641 is available in a 28-pin 4mm × 5mm QFN
package and 28-pin TSSOP package. Both packages have
an exposed pad for low thermal resistance.
0
HV Channel Effi ciency,
Regulator with Power-On
0.2
2MHz, V
®
3641 is a dual channel, current mode monolithic buck
0.4
V
OUT1
0.6
V
Dual Monolithic Buck
CURRENT (A)
IN
OUT1
= 12V
0.8
= 5V
1.0
1.2
3641 TA01b
1.4
95
90
85
70
80
75
0
LV Channel Effi ciency,
2MHz, V
0.2
V
0.4
OUT2
V
IN2
CURRENT (A)
OUT2
= 5V
LT3641
0.6
= 3.3V
0.8
1.0
3641 TA01c
1
3641f
1.2
®

Related parts for lt3641

lt3641 Summary of contents

Page 1

... The window mode watchdog timer fl ags when the μP pulses group too close together or too far apart. The LT3641 is available in a 28-pin 4mm × 5mm QFN package and 28-pin TSSOP package. Both packages have an exposed pad for low thermal resistance. ...

Page 2

... CPOR Voltages………... ........................... –0.3V to 2.5V SW2 Voltage ................................ –0. Operating Junction Temperature Range (Note 2) LT3641E ................................................. –40°C to 125°C LT3641I .................................................. –40°C to 125°C Storage Temperature Range ................... –65°C to 150°C Lead Temperature, FE Only (Soldering, 10 sec) .... 300°C 28 SS2 ...

Page 3

... SW1 FB1 = 1V (Note 3) FB1 = 0.1V FB1 = 1V (Note 4) FB1 = 0. 800mA SW1 Rising EN2 = EN2 Threshold FB2 = 0.6V 2.5V < V < 5.5V IN2 (Note 5) (Note 0.5A (Note 6) SW2 I = 0.5A (Note 6) SW2 FB2 = 0.6V 1mA PGOOD2 LT3641 MIN TYP MAX UNITS l 3 3.8 4.2 V 0.1 1 μA 275 375 μA 1.2 1.26 1 μA 0.1 μ ...

Page 4

... The LT3641I is guaranteed and tested over the full –40°C to 125°C operating junction temperature range. Note 3: SW1, SW2 current limit is guaranteed by design and/or correlation to static test ...

Page 5

... Quiescent Current 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0. 1.0 V VOLTAGE (V) IN FB1 Voltage vs SS1 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 150 0 0.5 1.0 1.5 SS1 VOLTAGE (V) LT3641 T = 25°C, unless otherwise noted Channel Effi ciency (2MHz 1.2V) OUT2 IN2 75 = 12V IN = 24V IN = 36V IN = 48V 0.2 0.4 0.6 V CURRENT (A) OUT2 3641 G02 Quiescent Current vs Temperature 350 ...

Page 6

... LT3641 TYPICAL PERFORMANCE CHARACTERISTICS FB2 Voltage vs SS2 700 600 500 400 300 200 100 0 0 400 6000 800 1000 200 SS2 VOLTAGE (mV) 3641 G10 LV Channel Peak Current Limit vs Duty Cycle 2.0 1.5 1.0 0.5 0 DUTY CYCLE (%) 3641 G13 HV Channel Switching Frequency (V = 3.3V) OUT1 2 32. ...

Page 7

... V IN1 IN2 OUT1 V = 3.3V/25mA V = 1.8V/30mA OUT1 OUT2 RST/WDO Pull-Up Current 100 150 0 3641 G21 LT3641 = 25°C, unless otherwise noted. A Watchdog Upper Boundary Period vs C WDT 180 160 140 120 100 3641 G19 0 1000 2000 3000 ...

Page 8

... PGOOD2 (Pin 2/Pin 27): Open-drain logic output that starts to sink current when FB2 is in regulation. EN/UVLO (Pin 3/Pin 28): Pull this pin below 0.3V to shut down the LT3641. The 1.26V threshold can function as an accurate undervoltage lockout, preventing the LT3641 from operating until V voltage has reached the programmed IN level ...

Page 9

... RAMP Σ – OSCILLATOR GENERATOR + Σ VC2 R A7 – – REF 50mV – 600mV – WATCHDOG TIMER RST1 RST2 WDE WDO WDI LT3641 BST BST C BST DRIVER + A1 – L1 SW1 D1 DA – SYNC + V A5 – C IN2 L2 SW2 ...

Page 10

... BST pin. An external capacitor and diode are and SW1 pins, turning used to generate a voltage between the BST and SW pins. During the power-up of the LT3641, an internal 5mA current source charges the external BST capacitor. The regulator starts switching when the (BST-SW) voltage reaches the 2V threshold. The internal NPN power switch can be fully saturated for effi ...

Page 11

... The RST1 and RST2 pin. IN pins are pulled low when the LT3641 is enabled and V above 3.6V. Once the FB1 pin rises above 1.165V, the high voltage channel reset timer is started and RST1 is released after the reset timeout period. The low voltage channel reset timer is started once the FB2 pin rises above 550mV, and releases RST2 after the reset timeout period ...

Page 12

... V and the EN/UVLO pin. The EN/UVLO threshold is 1.26V. When the LT3641 is enabled, a 2μA current fl ows out of the EN/UVLO pin generating hysteresis to prevent the switching action from falsely disabling the LT3641. Choose the divider resistances for appropriate hysteresis voltage. • ...

Page 13

... Inductor Selection Inductor selection involves inductance, saturation current, 3641 F01 series resistance (DCR) and magnetic loss. The inductance for the high voltage channel is: L1= 1.7 • LT3641 pin can be connected to either an IN2 voltage to regulate output voltage at IN2 V ≈ OUT2 ...

Page 14

... The input capacitor is required to reduce the resulting voltage ripple. Use a ceramic capacitor with: ≥ where f S WEBSITE www.murata.com www.tdk.com www.toko.com www.sumida.com www.cooperindustries.com www.coilcraft.com www.vishay.com www.niccomp.com www.we-online.com pin of the LT3641 with a ceramic capacitor IN 10μ the switching frequency in MHz. 3641f ...

Page 15

... A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT3641. A ceramic input capacitor combined with trace or cable inductance forms a under damped tank circuit. If the LT3641 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3641’ ...

Page 16

... Figure 2 shows that the minimum input voltage to start the high voltage channel nonsynchronous buck regulator (MV) (MV) of the LT3641 is very close to the minimum input voltage to regulate the output voltage for most of the load range. 595 500 500 500 650 620 620 760 ...

Page 17

... APPLICATIONS INFORMATION Soft-Start The LT3641 has a soft-start pin for each channel. The feedback pin voltage is regulated to the lower of the corresponding SS pin and the internal references, which is 1.265V for the high voltage channel, and 600mV for the low voltage channel. A capacitor from the SS pin to ground is charged by an internal 2μ ...

Page 18

... LT3641’s internal circuitry will pull its qui- escent current through the SW1 pin or the SW2 pin. This is fi the system can tolerate a few mA in this state. If the LT3641 is disabled, the SW1 pin and the SW2 pin 3641 F05 current will drop to essentially zero. However, if the V ...

Page 19

... OUT2 (7c) Figure 7. PFM Operation Power-On Reset Timer Each channel of the LT3641 has a power-on comparator. Both comparators are enabled when the LT3641 is powered up and starts monitoring their corresponding feedback voltages. The threshold of power-on comparator is 1.15V for the high voltage channel, and 550mV for the low voltage channel ...

Page 20

... LT3641 APPLICATIONS INFORMATION The WDO is open-drain output with weak internal pull-up, similar to the RST pins. The delay period corresponding to 33 cycles on CWDT, the watchdog lower boundary (4 cycles on CWDT), and the watchdog upper boundary (64 cycles on CWDT) are all related and set by a capacitor, C ...

Page 21

... IN possible. These external components should be placed on the same side of the circuit board as the LT3641, and their connections should be made on that layer. Place a local, unbroken ground plane below these components. The BST and SW nodes should be as small as possible. ...

Page 22

... LT3641 APPLICATIONS INFORMATION FB1 EN2 V IN2 (10a) FB1 EN2 V IN2 (10b) FB1 PGOOD2 V IN2 EN2 (10c) Figure 10. The EN2 and PGOOD2 Pins Allow Serial Sequencing Options 22 OUT1 90% OUT1 OUT1 2.3V OUT1 OUT1 OUT3 PROGRAMMED LEVEL OUT1 90% OUT1 OUT2 OUT1 OUT2 OUT1 OUT3 ...

Page 23

... BST SW1 IN DA SYNC FB1 WDE EN2 PGOOD2 LT3641 V IN2 RST1 RST2 SW2 WDO WDI FB2 CWDT CPOR RT GND SS2 SS1 1nF 1.5nF 32.4k 1.5nF 1nF LT3641 D2 L1 3.3μH V OUT1 3.3V/1.3A 22μF 80.6k D1 49.9k V IN2 2.5V TO 5.5V 4.7μF L2 1μH V OUT2 1.8V/1.1A 22μF 100k 49.9k 3641 TA02 3641f 23 ...

Page 24

... D2: CENTRAL SEMI CMDD6263 * RESTRICTIONS APPLY FOR INPUT VOLTAGES ABOVE 42V 24 2MHz 5V/0.8A and 1.2V/1A Buck Regulators 0.22μF 453k EN/UVLO V SW BST SW1 IN DA SYNC FB1 WDE EN2 LT3641 WDI V IN2 PGOOD2 WDO SW2 RST1 RST2 FB2 CWDT CPOR RT GND SS2 SS1 1nF 1.5nF 32 ...

Page 25

... Buck Regulators 0.22μF EN/UVLO V SW BST SW1 IN DA SYNC FB1 WDE EN2 PGOOD2 LT3641 V IN2 RST1 RST2 SW2 WDO FB2 WDI CWDT CPOR RT GND SS2 SS1 1nF 1.5nF 32.4k 1.5nF 1nF 3641 TA04 LT3641 D2 L1 3.3μH V OUT1 3V/0.8A 22μF 68.1k D1 49.9k L2 0.47μH V OUT2 0.6V/1A 22μF 3641f 25 ...

Page 26

... LT3641 PACKAGE DESCRIPTION 4.75 (.187) 6.60 ± 0.10 4.50 ± 0.10 SEE NOTE 4 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 0.50 – 0.75 (.0035 – .0079) (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE 26 FE Package 28-Lead Plastic TSSOP (4.4mm) ...

Page 27

... UFD Package 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 ± 0.05 3.65 ± 0.05 PACKAGE OUTLINE 3.50 REF 4.10 ± 0.05 5.50 ± 0.05 0.75 ± 0.05 4.00 ± 0.10 (2 SIDES) 3.50 REF 0.200 REF 0.00 – 0.05 LT3641 PIN 1 NOTCH 2.50 REF R = 0.20 OR 0.35 × 45 CHAMFER 0.115 TYP TYP 27 28 0.40 ± 0. 3.65 0.10 2.65 0.10 (UFD28) QFN 0506 REV B 0.25 ± ...

Page 28

... McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● 2MHz 3.3V/0.8A and 0.8V/1.2A Buck Regulators 0.22μF EN/UVLO V SW BST SW1 IN DA SYNC FB1 EN2 PGOOD2 LT3641 V IN2 RST1 WDE RST2 SW2 WDO WDI FB2 CWDT CPOR RT GND SS2 SS1 1nF 32.4k 1nF ...

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