ncp5214 ON Semiconductor, ncp5214 Datasheet

no-image

ncp5214

Manufacturer Part Number
ncp5214
Description
2-in-1 Notebook Ddr Power Controller
Manufacturer
ON Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP5214
Manufacturer:
ON
Quantity:
156
Part Number:
ncp5214A
Manufacturer:
ON
Quantity:
100
Part Number:
ncp5214AMNR2G
Manufacturer:
ON
Quantity:
2 942
Part Number:
ncp5214AMNR2G
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
ncp5214MNR2G
Manufacturer:
ON
Quantity:
5
Part Number:
ncp5214MNR2G
Manufacturer:
ON/安森美
Quantity:
20 000
NCP5214
2−in−1 Notebook DDR
Power Controller
specifically designed as a total power solution for notebook DDR
memory system. This IC combines the efficiency of a PWM
controller for the VDDQ supply with the simplicity of linear
regulators for the VTT termination voltage and the buffered low
noise reference. This IC contains a synchronous PWM buck
controller for driving two external NFETs to form the DDR memory
supply voltage (VDDQ). The DDR memory termination regulator
output voltage (VTT) and the buffered VREF are internally set to
track at the half of VDDQ. An internal power good voltage monitor
tracks VDDQ output and notifies the user whether the VDDQ output
is within target range. Protective features include soft−start
circuitries, undervoltage monitoring of supply voltage, VDDQ
overcurrent protection, VDDQ overvoltage and undervoltage
protections, and thermal shutdown. The IC is packaged in DFN−22.
Features
Typical Applications
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 0
The NCP5214 2−in−1 Notebook DDR Power Controller is
DC and 2.4 A Peak Current
Incorporates VDDQ, VTT Regulator, Buffered VREF
Adjustable VDDQ Output
VTT and VREF Track VDDQ/2
Operates from Single 5.0 V Supply
Supports VDDQ Conversion Rails from 4.5 V to 24 V
Power−saving Mode for High Efficiency at Light Load
Integrated Power FETs with VTT Regulator Sourcing/Sinking 1.5 A
Requires Only 20 mF Ceramic Output Capacitor for VTT
Buffered Low Noise 15 mA VREF Output
All External Power MOSFETs are N−channel
<5.0 mA Current Consumption During Shutdown
Fixed Switching Frequency of 400 kHz
Soft−start Protection for VDDQ and VTT
Undervoltage Monitor of Supply Voltage
Overvoltage Protection and Undervoltage Protection for VDDQ
Short−circuit Protection for VDDQ and VTT
Thermal Shutdown
Housed in DFN−22
This is a Pb−Free Device
Notebook DDR/DDR2 Memory Supply and Termination Voltage
Active Termination Busses (SSTL−18, SSTL−2, SSTL−3)
1
†For information on tape and reel specifications,
NCP5214MNR2G
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
VDDQEN
DDQREF
VTTGND
VTTEN
FBVTT
FPWM
AGND
VCCA
Device
1
VTTI
VTT
NOTE: Pin 23 is the thermal pad on
NCP5214 = Specific Device Code
A
WL
YY
WW
G
SS
ORDERING INFORMATION
PIN CONNECTIONS
22
http://onsemi.com
the bottom of the device.
CASE 506AF
MN SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Top View)
(Pb−Free)
DFN−22
Package
DFN−22
Publication Order Number:
2500 Tape & Reel
1
Shipping†
MARKING
DIAGRAM
AWLYYWW
NCP5214
PGND
BGDDQ
VCCP
SWDDQ
TGDDQ
BOOST
OCDDQ
PGOOD
VTTREF
FBDDQ
COMP
NCP5214/D
G

Related parts for ncp5214

ncp5214 Summary of contents

Page 1

... NCP5214 2−in−1 Notebook DDR Power Controller The NCP5214 2−in−1 Notebook DDR Power Controller is specifically designed as a total power solution for notebook DDR memory system. This IC combines the efficiency of a PWM controller for the VDDQ supply with the simplicity of linear regulators for the VTT termination voltage and the buffered low noise reference ...

Page 2

... VTT COUT2 Ceramic FBVTT VTTGND 5VCC VCCA VREF VTTREF 0 DDQREF AGND NCP5214 OCDDQ BOOST VCCP TGDDQ SWDDQ NCP5214 BGDDQ PGND1 COMP CZ1 RZ1 FBDDQ VTTI Figure 1. Typical Application Diagram http://onsemi.com 2 CL1 RL1 5VCC 4 (Battery/ Adapter) M1 VDDQ L 1 ...

Page 3

... PGOOD OSC PGND VOCDDQ Adaptive Ramp + − SC2PWR VTTI Deadband Control + − VTTREF SC2GND + VTTREF − COUT3 GND AGND NCP5214 VREFGD THERMAL TSD VDDQEN SHUTDOWN VTTEN FPWM CONTROL VCCAGD LOGIC FAULT INREGDDQ ILIM + − VDDQ PWM FBDDQ LOGIC SWDDQ VDDQEN Power− ...

Page 4

... VDDQ regulator high−side gate driver supply. 21 BGDDQ Gate driver output for VDDQ regulator low−side N−Channel power FET. 22 PGND Power ground for the VDDQ regulator. 23 THPAD Copper pad on bottom of IC used for heatsinking. This pin should be connected to the ground plane under the IC. NCP5214 Description http://onsemi.com 4 ...

Page 5

... Human Body Model (HBM) ≤2.0 kV per JEDEC standard: JESD22–A114 except Pin 17 which is ≤500 V. Machine Model (MM) ≤200 V per JEDEC standard: JESD22–A115 except Pin 17 which is ≤ Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78. 3. Pin 16 (OCDDQ) must be pulled high to VIN through a resistor. NCP5214 Symbol ...

Page 6

... Ratio IN OCDDQ Pin Current Sink OCDDQ Pin Current Sink Temperature Coefficient Minimum On Time Maximum Duty Cycle Soft−Start Current Overvoltage Trip Threshold Undervoltage Trip Threshold 4. Guaranteed by design, not tested in production. NCP5214 ( −40 to 85_C CCA CCP = 25_C.) A Symbol ...

Page 7

... Soft−Start Source Current Limit Maximum Soft−Start Time V OUTPUT TTREF V Source Current TTREF V Accuracy Referred to 1/2V TTREF DDQREF 5. Guaranteed by design, not tested in production. NCP5214 (continued −40 to 85_C Symbol Test Conditions GAIN (Note 5) Ft COMP_GND = 220 nF, 1 Series (Note 5) ...

Page 8

... FPWM Pin Threshold High FPWM Pin Threshold Low FPWM Pin Input Current PGOOD Pin ON Resistance PGOOD Pin OFF Current PGOOD LOW−to−HIGH Hold Time, for Guaranteed by design, not tested in production. NCP5214 = −40 to 85_C CCA CCP = 25_C ...

Page 9

... T , AMBIENT TEMPERATURE (°C) A Figure 5. VCCA Shutdown Current vs. Ambient Temperature 0.90 0.85 0.80 0.75 0.70 −40 − AMBIENT TEMPERATURE (°C) A Figure 7. VDDQ Feedback Voltage vs. Ambient Temperature NCP5214 1.0 0.8 0.6 0.4 0.2 0 −40 − AMBIENT TEMPERATURE (°C) A Figure 4. VCCA Quiescent Current in S3 vs. Ambient Temperature 450 425 400 375 350 ...

Page 10

... Figure 11. VTT Output Voltage (DDR) vs. VTT Output Current 1.260 1.255 1.250 1.245 V = 2.5 V DDQ T = 25°C A 1.240 VTTR OUTPUT CURRENT (mA) VTTR Figure 13. VTTR Output Voltage (DDR) vs. VTTR Output Current NCP5214 1.810 1.805 1.800 1.795 V = 1.8 V DDQ S0 Mode T = 25°C A 1.790 0.94 0.93 0.92 0.91 ...

Page 11

... Figure 15. VDDQ Efficiency (DDR) vs. VDDQ Output Current VIN VDDQ VTT VTTR VDDQEN = High; VTTEN = High; VIN = Figure 17. Power−Up Waveforms VDDQEN VDDQ VTTR PGOOD VDDQEN = Figure 19. VDDQ, VTTR Start−Up Waveforms NCP5214 100 ...

Page 12

... IVDDQ = 50 mA, IVTT = 100 mA, IVTTR = 5 mA Figure 23. S0−S3−S0 Transition Waveforms VDDQ VTT VTTR IVDDQ IVDDQ = 0 A−7 A, IVTT = 1.5 A, IVTTR = 15 mA Figure 25. VDDQ Load Transient NCP5214 VTTEN 5V/div VTT 1V/div 500mA/div IVTTI VDDQEN = High; VTT Loaded with 4 GND Figure 22. VTT Shutdown Waveforms ...

Page 13

... IVDDQ = 0 A, IVTT = 0 A, IVTTR = 0 mA, VIN = Figure 29. Line Transient 7V to 20V at No Load VDDQ VTT VTTR VIN IVDDQ = 10A, IVTT = 1.5A, IVTTR = 15mA, VIN = 7V to 20V Figure 31. Line Transient 7V to 20V at Full Load NCP5214 VDDQ 100mV/div VTT 50mV/div VTTR 50mV/div IVTT 2A/div IVDDQ = 8 A, IVTT = − ...

Page 14

... IVDDQ = 8 A, VTT shorts to ground, IVTTR = 15 mA Figure 33. VTT Short Circuit to Ground and Recovery VDDQ, 1V/div VSWDDQ, 10V/div VIN, 20V/div Figure 35. VDDQ OCP by Short Circuit to Ground Figure 37. VDDQ OCP by Start into a Short NCP5214 VDDQ 100mV/div VTT 1V/div VTTR 50mV/div IVTT 5A/div IVDDQ = 8 A, VTT shorts to VDDQ, IVTTR = 15 mA Figure 34 ...

Page 15

... General The NCP5214 2−in−1 Notebook DDR Power Controller combines the efficiency of a PWM controller for the VDDQ supply, with the simplicity of using a linear regulator for the VTT termination voltage power supply. The VDDQ output can be adjusted through the external potential divider, while the VTT is internally set to track half VDDQ ...

Page 16

... The VTT regulator will have an internal soft−start when it is transited from disable to enable. During the VTT soft−start, a current limit is used as a NCP5214 current source to charge up the VTT output capacitor. The current limit is initially 1.0 A during VTT soft−start then increased to 2 ...

Page 17

... When the VDDQ output is above 106% but below 130% of the nominal regulation output voltage, the controller turns off the high−side MOSFET and turns on the low−side NCP5214 MOSFET to discharge the excessive output voltage. When the VDDQ output voltage goes back down to the nominal regulation voltage, normal switching cycles are resumed ...

Page 18

... VDDQ of 3.0 V. VTTEN goes and VTTREF go into HIGH, VTT is enabled normal mode. but not activated until VDDQ is good. Figure 38. Powerup and Powerdown Timing Diagram NCP5214 VTT in H−Z VTT Soft−start X 200 VTTEN goes LOW to activate S3 mode and to turn off VTT. ...

Page 19

... For steady output ripple voltage, both ESR and capacitance of the output capacitor are the contributing factors, however, the capacitor ESR is the dominant factor. The output ripple voltage is calculated as follows: I L(ripple) V ripple + I L(ripple) ESR ) NCP5214 APPLICATION INFORMATION V ripple + I L(ripple) where I L(ripple) and C is the output capacitance. ...

Page 20

... V IN where I is the maximum load current. LOAD(max) The DC current rating of the inductor should be about 1.2 times of the peak inductor current at maximum output load NCP5214 current. Therefore, the maximum DC current rating of the inductor can be obtained by: (eq. 11) where I L(peak) current which is determined by: ...

Page 21

... Since NCP5214 is a voltage mode PWM converter with output LC filter, Type III compensation network is required to obtain the desired close loop bandwidth and phase boost with unconditional stability. The NCP5214 PWM modulator, output LC filter and Type III compensation network are shown in Figure 39. xR and a The output LC filter has a double pole and a single zero ...

Page 22

... ZESR + 2p ESR Compensation network DC Gain can be calculated by the equation: G COMP(DC log 100 −20 −40 −60 Figure 40. Asymptotic Bode Plot of the Converter Gain NCP5214 NCP5214 VBOOST Q1 TGDDQ VDDQ SWDDQ VCCP Q2 PWM LOGIC BGDDQ PGND PGND PWM COMP COMP C2 C3 ...

Page 23

... The output voltage of the buck regulator can be adjusted by the feedback resistor divider formed by R the value selected when determining the 1 compensation components, the value of R by: NCP5214 By using the above equations and guidelines, the compensation components values can be determined by the 1 (eq. 28) equations below: L ...

Page 24

... VTT linear regulator high−side MOSFET, and the maximum VTT output current with VTT within regulation window will also be reduced if the external voltage is lower than VDDQ. Besides, the VTTI pin input must be bypassed NCP5214 to VTTGND with at least capacitor if external voltage source is used. Design Example A design example of a VDDQ bulk converter with the (eq ...

Page 25

... OUT calculated as: 2p 100 kHz NCP5214 Second, the ESR required to meet the transient load undershoot requirement is considered, such that: Therefore, the suitable ESR smaller, and the value of 7 selected for more design margin and better performance. Then, two same SP−Caps or POSCAPs ...

Page 26

... Since a 4.3 kW resistor is chosen as the high−side resistor R , the resistance value of low−side resistor R 1 calculated by 0.8 4 3.44 kW 1.8 V−0.8 V NCP5214 . Then, if the second zero break frequency is placed at the LC 3 filter’s double pole and the second pole is placed at half the switching frequency, the value (eq. 58) + 7.5 nF ...

Page 27

... NCP5214 vias with 0.6 mm hole−diameter to help heat dissipation and ensure good thermal capability recommended to use PCB with copper foil ...

Page 28

... Figure 41. Schematic Diagram of Evaluation Board NCP5214 C5 (option) U1 0.1 mF NCP5214 16 OCDDQ R6 20 5.6 kW VCCP 4.7 mF MBR0530T1 BOOST D1 NTMS4700N C7 Q1 0.1 mF NCP5214 R7 18 TGDDQ 0 W N−CHANNEL 1 7.3 mW SWDDQ NTMS4107N Q2 R8 BGDDQ N−CHANNEL 22 PGND C14 30 V, 4.7 mW 100 pF 12 COMP C15 R9 4 ...

Page 29

... PCB Layout of Evaluation Board Figure 42. Silkscreen of Evaluation Board PCB Figure 44. Middle Layer1 of Evaluation Board PCB Layout Figure 46. Bottom Layer of Evaluation Board NCP5214 Figure 43. Top Layer of Evaluation Board PCB Layout Figure 45. Middle Layer2 of Evaluation Board PCB Layout PCB Layout http://onsemi.com 29 ...

Page 30

... Resistor, 130 W 1% 0603 Panasonic ERJ3EKF1300V Resistor, 4 0603 Panasonic ERJ3EKF4301V Resistor, 3. 0603 Panasonic ERJ3EKF3441V Resistor, 3 0603 Panasonic ERJ3GEYJ3R3V Header, single pin ON Semiconductor NCP5214 Shunt, 100 mil jumper http://onsemi.com 30 Mfg. & P/N Remark C3 & C20 are optional C5 is optional ...

Page 31

... 0.10 C 0.05 C BOTTOM VIEW NCP5214 DFN−22 MN SUFFIX CASE 506AF−01 ISSUE A NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINALS AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ...

Page 32

... USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 32 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NCP5214/D ...

Related keywords