x9523v20iz-bt1 Intersil Corporation, x9523v20iz-bt1 Datasheet
x9523v20iz-bt1
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x9523v20iz-bt1 Summary of contents
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Data Sheet Dual DCP, POR, Dual Voltage Monitors FEATURES • Two Digitally Controlled Potentiometers (DCPs) —100 Tap - 10kΩ —256 Tap - 100kΩ —Nonvolatile —Write Protect Function • 2-Wire Industry Standard Serial Interface • Power-On Reset (POR) Circuitry —Programmable ...
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... X9523V20I-B X9523VIB -40 to +85 X9523V20IZ-A X9523VZIA -40 to +85 (Note) X9523V20IZ-B X9523VZIB -40 to +85 (Note) *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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PIN ASSIGNMENT Pin Name R 1 Connection to end of resistor array for (the 256 Tap) DCP Connection to terminal equivalent to the “Wiper” mechanical potentiometer for DCP Connection to ...
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SCL SDA PRINCIPLES OF OPERATION SERIAL INTERFACE Serial Interface Conventions The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The ...
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SCL SCL from from Master Master Data Output from Transmitter Data Output from Start Receiver Figure 3. minate further data transmissions if an ACKNOWLEDGE is not detected. The master must then issue a STOP condition to place the device into ...
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STOP condition), the X9523 initiates an internal high voltage write cycle. This cycle typically requires 5 ms. During this time, no further Read or Write commands can be issued to the device. Write Acknowledge Polling is used to determine ...
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V1/Vcc t trans 0 The data in the WCR is then decoded to select and enable one of the respective FET switches. A “make before break” sequence is used internally for the FET switches when the wiper is moved from ...
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WRITE TYPE † WT Description Select a Volatile Write operation to be performed 0 on the DCP pointed to by bits P1 and P0 Select a Nonvolatile Write operation ...
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S t Signals from Slave a the Master Address r t SDA Bus Signals from the Slave It should be noted that all writes to any DCP of the X9523 are random in ...
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CS3 CS7 CS6 CS4 CS5 0 POR1 V2OS V3OS DWLK NV NV Bit(s) Description POR1 Power-on Reset bit V2OS V2 Output Status flag V1OS V1 Output Status flag CS4 Always set to “0” (RESERVED) DWLK Sets the DCP Write Lock ...
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SCL SDA SLAVE ADDRESS BYTE T Figure 13. CONSTAT Register Write Command Sequence POR1, POR0: Power-on Reset bits - (Nonvolatile) Applying voltage to V activates the Power-on Reset CC ...
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S t Signals from Slave a the Master Address r t SDA Bus Signals from the Slave “Dummy” Write Figure 14. CONSTAT Register Read Command Sequence —Write a one byte value to the ...
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WP: Write Protection Pin When the Write Protection (WP) pin is active (HIGH), it disables nonvolatile write operations to the X9523. The table (X9523 Write Permission Status) summarizes the effect of the WP pin (and DCP Write Lock), on the ...
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V1 / Vcc V2 SCL SDA † A0h Figure 17. Setting V V THRESHOLDS (X = 1,2,3) TRIPX The X9523 is shipped with pre-programmed threshold ...
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Setting a Lower V Voltage (x = 1,2,3). TRIPx In order to set lower voltage than the TRIPx present value, then V must first be “reset” accord- TRIPx ing to the procedure described below. Once V has ...
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V TRIPx Desired V NO present value? V TRIPx Sequence Set Vx = desired V New Vx applied = Set Higher V + Old Vx applied | Error | Sequence Apply Vcc & Voltage > Desired V Decrease Vx NO ...
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ABSOLUTE MAXIMUM RATINGS Temperature under Bias Storage Temperature Voltage on WP pin (With respect to Vss) Voltage on other pins (With respect to Vss) | Voltage Voltage D.C. Output Current (SDA,V1RO,V2RO,V3RO) Lead Temperature ...
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TIMING DIAGRAMS Figure 22. Bus Timing t F SCL t SU:DAT t SU:STA t HD:STA SDA IN SDA OUT Figure 23. WP Pin Timing START SCL SDA IN t SU:WP WP Figure 24. Write Cycle Timing SCL 8th bit of ...
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Figure 25. Power-Up and Power-Down Timing t R V1/Vcc 0 Volts V1RO 0 Volts MR 0 Volts Figure 26. Manual Reset Timing Diagram MR V1RO V1 / Vcc Figure 27. V2, V3 Timing Diagram RPDx VxRO ...
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Figure 28. V Programming Timing Diagram (x = 1,2,3). TRIPX V Vcc, V2 TSU VPS SCL SDA NOTE : V1/Vcc must be greater than V2, V3 when programming. Figure 29. DCP “Wiper Position” Timing ...
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D.C. OPERATING CHARACTERISTICS Symbol Parameter Current into V Pin CC (1) I CC1 Read memory array Write nonvolatile memory Current into V Pin CC (2) I CC2 With 2-Wire bus activity Input Leakage Current (SCL, SDA, MR Input ...
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A.C. CHARACTERISTICS (See Figure 22, Figure 23, Figure 24) Symbol f SCL Clock Frequency SCL (5) t Pulse width Suppression Time at inputs IN (5) t SCL LOW to SDA Data Out Valid AA (5) t Time the bus free ...
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POTENTIOMETER CHARACTERISTICS Symbol Parameter R End to End Resistance Tolerance TOL V R Terminal Voltage (x = 0,1,2) RHx Terminal Voltage (x = 0,1,2) RLx L P (1)(6) Power Rating R R DCP Wiper Resistance W I ...
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1,2,3) PROGRAMMING PARAMETERS (See Figure 28) TRIPX Parameter t V Program Enable Voltage Setup time VPS TRIPx t V Program Enable Voltage Hold time VPH TRIPx t V Setup time TSU TRIPx t V Hold (stable) time ...
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APPENDIX 1 DCP1 (100 Tap) Tap position to Data Byte translation Table Tap Position Decimal ...
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APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 1) unsigned DCP1_TAP_Position(int tap_pos) { int block; int i; int offset; int wcr_val; offset= 0; block = tap_pos / 25; if (block < 0) return ((unsigned)0); ...
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APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 2) unsigned DCP100_TAP_Position(int tap_pos optional range checking */ if (tap_pos < 0) return ((unsigned)0); else if (tap_pos >99) return ((unsigned) 96); /* 100 Tap ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...