l6712a STMicroelectronics, l6712a Datasheet
l6712a
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l6712a Summary of contents
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... VSEN March 2004 SO28 Package SO L6712D, L6712AD VFQFPN L6712Q, L6712AQ L6712QTR, L6712AQTR DESCRIPTION The device implements a dual-phase step-down con- troller with a 180 phase-shift between each phase optimized for high current DC/DC applications. Output voltage can be programmed through the in- tegrated DAC from 0.900V to 3.300V; program- ming the " ...
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... L6712A L6712 ABSOLUTE MAXIMUM RATINGS Symbol PGND CC CCDR V -V Boot Voltage BOOT PHASE V -V UGATE1 PHASE1 V -V UGATE2 PHASE2 LGATE1, PHASE1, LGATE2, PHASE2 to PGND VID0 to VID2 All other pins to PGND V Sustainable Peak Voltage. T<20ns @ 600kHz PHASEx UGATEX Pins Maximum Withstanding Voltage Range Test Condition: CDF-AEC-Q100-002” ...
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... OSC = OPEN; Tj=0°C to 125°C 127 I =5mA 0.5 SINK L6712, OSC = OPEN DROOP 30 OSC = OPEN; I =70µA DROOP L6712A, OSC = OPEN 85 OVP Active 4.75 VIDx See Table 1, VID ≠ “11x“ -0.9 VID = “110“ -1.0 VIDx See Table 1, VID ≠ “111” V OUT from 0 to 3mA REF VID=“ ...
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... L6712A L6712 ELECTRICAL CHARACTERISTCS (continued 12V±10 0°C to 70°C unless otherwise specified Symbol Parameter DC Gain SR Slew Rate DIFFERENTIAL CURRENT SENSING Bias Current ISEN1 ISEN2 I Bias Current PGNDSx Bias Current at ISEN1 ISEN2 Over Current Threshold I Droop Current ...
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... Channel 2 Power Ground sense pin. The net connecting the pin to the sense point must be routed as close as possible to the ISEN2 net in order to couple in common mode any picked-up noise. L6712A L6712 This pin has to be connected to the dsON. 5/27 ...
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... L6712A L6712 PIN FUNCTION (continued) N. (*) Name SO VFQFPN 16 16 ISEN2 17 18 OSC/INH FAULT 18 20 FBG 19 21 FBR VID0 PGOOD 24 27 BOOT2 25 28 UGATE2 26 29 PHASE2 27 30 LGATE2 28 31, PGND 32 PAD THERMAL PAD (*) Pin not reported in QFN column have to be considered as Not Connected, not internally bonded. ...
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... ON the lower driver and driving high the FAULT pin. VCC BOOT2 UGATE2 HS2 PHASE2 LGATE2 LS2 ISEN2 Rg L6712 PGNDS2 Rg L6712A PGND PGOOD COMP C F DROOP VSEN FBR FBG dsON L6712A L6712 LOAD OUT PGOOD or across a sense resistor placed 7/27 ...
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... L6712A L6712 OSCILLATOR The switching frequency is internally fixed at 150kHz. Each phase works at the frequency fixed by the os- cillator so that the resulting switching frequency at the load side results in being doubled. The internal oscillator generates the triangular waveform for the PWM charging and discharging with a constant current an internal capacitor. The current delivered to the oscillator is typically 25µ ...
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... EXT_REF (worst case with external reference) § 2 [%] ( V [%] ) K ⋅ © OUT _ACC O S (with internal reference) L6712A L6712 INTERNAL REFERENCE EXTERNAL REFERENCE ERROR AMPLIFIER PROG FB COMP ± ( 8mV ) 0. -------------------- - 100 ⋅ ⋅ OUT V · O S_EA O S_RA ⋅ ...
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... L6712A L6712 V [%] = EXT_REF_Accuracy[%] ( O UT _TOT_ACC DRIVER SECTION The integrated high-current drivers allow using different types of power MOS (also multiple MOS to reduce the R ), maintaining fast switching transition. dsON The drivers for the high-side mosfets use BOOTx pins for supply and PHASEx pins for return. The drivers for the low-side mosfets use VCCDR pin for supply and PGND pin for return ...
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... SENSE PHASEx I = ------------------------------------------------- INFOx and the average current for each phase (I to give the correction to the PWM output in order to equalize the AVG LGATEx ISENx PGNDSx L6712A L6712 dsON I + INFOx is the transcon the current PHASEx = ( AVG INFO1 INFO2 ...
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... L6712A L6712 The transconductance resistor Rg can be designed in order to have current information of 25µA per phase at full nominal load; the over current intervention threshold is set at 140% of the nominal (I According to the above relationship, the over current threshold (I placed at 1/2 of the total delivered maximum current, results: ...
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... V OUt Ipeak I MAX I OCPx reaches 35µA (I =70µA). The full load value is only a convention INFOx FB . Since the OCP intervention threshold is fixed, to modify the per- FB L6712A L6712 (I OCPx INFOx but it can be determined as follow: OCPx V Vout – IN MIN -------------------------------------- - 0.40 T ⋅ ⋅ L – ...
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... Crossing the UVP threshold causes the device to reset: all mosfets are turned off and a new soft start is then implemented allowing the device to recover if the over load cause has been removed. L6712A - Fixed Maximum Duty Cycle Limitation I The maximum duty cycle is fixed and constant with the delivered current. The device works in constant current operation once the OCP threshold has overcome ...
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... FB DROOP RA_Gain ⋅ ⋅ 50µA ∆ INTE RVENTIO N – FBR FBG Remote Remote V Ground OUT L6712A L6712 , proportional to the output current, R · SENSE --------------------- - I ⋅ ⋅ – ¹ FB OUT Rg 1 ------------------------ - R ⋅ ⋅ 70µA = – RA_Gain FB <0, no current ...
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... L6712A L6712 is finished (2048 clock cycles after start-up). During Soft-Start this pin is forced low. UVP. If the output voltage monitored by VSEN drops below the 60% of the reference voltage for more I than one clock period, the device turns off all mosfets and resets restarting operations with a new soft- start phase (hiccup mode, see figure 9) ...
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... OUT Turn ON threshold CH1=PGOOD; CH2=VOUT; CH3=REF_OUT 2 P ESR I ⋅ RMS RMS I ° OUT ⋅ ----------- - ° 2 ® rms ° I OUT ° ⋅ ----------- - 2 ¯ Where 0. L6712A L6712 Acquisition: 2D ⋅ < 0.5 – ⋅ > 0.5 – – /V OUT IN 17/27 ...
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... L6712A L6712 OUTPUT CAPACITOR The output capacitor is a basic component for the fast response of the power supply. Two-phase topology reduces the amount of output capacitance needed because of faster load transient response (switching frequency is doubled at the load connections). Current ripple cancellation due to the 180° ...
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... L 1 PWM1 I INFO2 CURRENT 1/5 SHARING DUTY CYCLE I INFO1 CORRECTION 1 PWM2 C O ERROR REFERENCE AMPLIFIER PROGRAMMED + BY VID - FB RA_Gain internally built; the error between the AVG ∆ I 2mV READ ------------------- - = --------------------------------------- - ⋅ MAX SENSE MAX L6712A L6712 R O 19/27 ...
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... L6712A L6712 Figure 13. Current Sharing Control Loop COMP Where ∆ the difference between one phase current and the ideal current (I READ For Ω and I = 40A the current sharing error is equal to 2.5%, neglecting errors due to Rg SENSE MAX and R mismatches. SENSE Average Current Mode (ACM) Control Loop (DROOP=FB) The average current mode control loop is reported in figure 14 ...
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... DROOP 2 ESR ⋅ ------------------------ - + © RA_Gain ----------------------------------- - RA_Gain ⋅ ⋅ ------------------ - -------------- - = – ∆ + OSC L6712A L6712 >>R ; ESR<< · ESR + ¹ ⋅ ⋅ ⋅ --------------- + + 2 Ro ⋅ G LOOP Z (s) F ω ω ω º » ¼ ...
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... L6712A L6712 LAYOUT GUIDELINES Since the device manages control functions and high-current drivers, layout is one of the most important things to consider when designing such high current applications. A good layout solution can generate a benefit in lowering power dissipation on the power paths, reducing radiation and a proper connection between signal and power ground can optimize the performance of the control loops ...
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... Current Reading: The Rg resistor has to be placed as close as possible to the ISENx and PGNDSx pins in order to limit the noise injection into the device. The PCB traces connecting these resistors to the read- (30 mils wide) (30 mils wide) (30 mils wide) L6712A L6712 of 600kHz max mosfet (or sense resistor) ...
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... L6712A L6712 ing point must be routed as parallel traces in order to avoid the pick-up of any noise. It's also important to avoid any offset in the measurement and to get a better precision, to connect the traces as close as pos- sible to the sensing elements, dedicated current sense resistor or low side mosfet R Moreover, when using the low side mosfet R connected to the PHASEx pin ...
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... MECHANICAL DATA TYP. MAX. 0.035 0.039 0.0008 0.0019 0.025 0.039 0.01 0.009 0.012 0.236 0.241 0.146 0.167 0.236 0.241 0.146 0.167 0.020 0.022 VFQFPN-36 (6x6x1.0mm) 0.022 0.029 Very Fine Quad Flat Package No lead 0.003 L6712A L6712 OUTLINE AND 7185332 F 25/27 ...
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... L6712A L6712 mm DIM. MIN. TYP. MAX. MIN. A 2.65 a1 0.1 0.3 0.004 b 0.35 0.49 0.014 b1 0.23 0.32 0.009 C 0.5 c1 45° (typ.) D 17.7 18.1 0.697 E 10 10.65 0.394 e 1.27 e3 16.51 F 7.4 7.6 0.291 L 0.4 1.27 0.016 S 8 ° (max.) 26/27 inch OUTLINE AND MECHANICAL DATA TYP. MAX. 0.104 0.012 0.019 0.013 0.020 0.713 0.419 0.050 0.65 0.299 0.050 SO28 ...
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