se97pw/1 NXP Semiconductors, se97pw/1 Datasheet

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se97pw/1

Manufacturer Part Number
se97pw/1
Description
Se97 Memory Module Temp Sensor With Integrated Spd
Manufacturer
NXP Semiconductors
Datasheet
1. General description
The NXP Semiconductors SE97 measures temperature from 40 C and +125 C and
also provides 256 bytes of EEPROM memory communicating via the I
typically mounted on a Dual In-Line Memory Module (DIMM) measuring the DRAM
temperature in accordance with the new JEDEC (JC-42.4) Mobile Platform Memory
Module Temperature Sensor Component specification and also replacing the Serial
Presence Detect (SPD) which is used to store memory module and vendor information.
Placing the Temp Sensor (TS) on a DIMM allows accurate monitoring of the DIMM module
temperature to better estimate the DRAM case temperature (T
exceeding the maximum operating temperature of 85 C. The chip set throttles the
memory traffic based on the actual temperatures instead of the calculated worst-case
temperature or the ambient temperature using a temp sensor mounted on the
motherboard. There is up to 30 % improvement in thin and light notebooks that are using
one or two 1 GB SO-DIMM modules, although other memory modules such as in server
applications will also see an increase in system performance. Future uses of the TS will
include more dynamic control over thermal throttling, the ability to use the Alarm Window
to create multiple temperature zones for dynamic throttling and to save processor time by
scaling the memory refresh rate.
The TS consists of a
own temperature readings 10 times per second, converts the reading to a digital data, and
latches them into the data temperature register. User-programmable registers, the
specification of upper/lower alarm and critical temperature trip points, EVENT output
control, and temperature shutdown, provide flexibility for DIMM temperature-sensing
applications.
When the temperature changes beyond the specified boundary limits, the SE97 outputs
an EVENT signal using an open-drain output that can be pulled up between 0.9 V and
3.6 V. The user has the option of setting the EVENT output signal polarity as either an
active LOW or active HIGH comparator output for thermostat operation, or as a
temperature event interrupt output for microprocessor-based systems. The EVENT output
can even be configured as a critical temperature output.
The EEPROM is designed specifically for DRAM DIMMs SPD. The lower 128 bytes
(address 00h to 7Fh) can be Permanent Write Protected (PWP) or Reversible Write
Protected (RWP) by software. This allows DRAM vendor and product information to be
stored and write protected. The upper 128 bytes (address 80h to FFh) are not write
protected and can be used for general purpose data storage.
The SE97 has a single die for both the temp sensor and EEPROM for higher reliability and
supports the industry-standard 2-wire I
TIMEOUT function is supported to prevent system lock-ups. Manufacturer and Device ID
registers provide the ability to confirm the identity of the device. Three address pins allow
SE97
Memory module temp sensor with integrated SPD
Rev. 02 — 12 October 2007
Analog to Digital Converter (ADC) that monitors and updates its
2
C-bus/SMBus serial interface. The SMBus
case
) to prevent it from
Product data sheet
2
C-bus/SMBus. It is

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se97pw/1 Summary of contents

Page 1

... Memory module temp sensor with integrated SPD Rev. 02 — 12 October 2007 1. General description The NXP Semiconductors SE97 measures temperature from 40 C and +125 C and also provides 256 bytes of EEPROM memory communicating via the I typically mounted on a Dual In-Line Memory Module (DIMM) measuring the DRAM temperature in accordance with the new JEDEC (JC-42.4) Mobile Platform Memory Module Temperature Sensor Component specifi ...

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... I C-bus/SMBus interface, the electrical specifications are specified with the operating voltage of 3 3.6 V. DIMM applications normally use the C-grade accuracy SE97PW or SE97TK temp sensor. For applications requiring the higher B-grade accuracy, the SE97PW/1 or SE97TK/1 is available. 2. Features 2.1 General features I JEDEC (JC-42 ...

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... NXP Semiconductors I Hard disk drives and other PC peripherals 4. Ordering information Table 1. Ordering information Type number Topside Package mark Name SE97PW SE97 TSSOP8 SE97PW/1 97/1 SE97TK SE97 HVSON8 SE97TK/1 97/1 5. Block diagram SE97 TEMPERATURE REGISTER CRITICAL ALARM TRIP UPPER ALARM TRIP LOWER ALARM TRIP CAPABILITY ...

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... SDA SCL EVENT V DD SE97_2 Product data sheet Memory module temp sensor with integrated SPD EVENT SE97PW SE97PW SCL 4 5 SDA 002aab805 Pin description Pin Type Description C-bus/SMBus slave address bit 0 with internal pull-down. This input is overvoltage tolerant to support software write protection ...

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... NXP Semiconductors 7. Functional description 7.1 Serial bus interface The SE97 communicates with a host controller by means of the 2-wire serial bus 2 (I C-bus/SMBus) that consists of a serial clock (SCL) and serial data (SDA) signals. The device supports SMBus, I speed is defined to have bus speeds from 100 kHz 400 kHz, and the SMBus is from 10 kHz to 100 kHz ...

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... NXP Semiconductors would not affect the SE97. From the system perspective, there will be a practical limit. That limit will be the voltage necessary for the device monitoring in the interrupt pin to detect a HIGH on its input. A possible practical limit for a CMOS input would be 0.4 V. ...

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... NXP Semiconductors 7.3.2 Critical trip The device can be programmed in such a way that the EVENT output is triggered when the temperature exceeds the critical trip point set by the Critical Alarm Trip register (04h). When the temperature sensor reaches the critical temperature value, the device is automatically placed in comparator mode ...

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... NXP Semiconductors Table 3. Register 01h 02h 03h 04h 22h 7.7 SMBus TIMEOUT The SE97 supports SMBus TIMEOUT feature. If the host holds SCL LOW more than 35 ms, the SE97 would reset its internal state machine to the bus IDLE state to prevent the system bus hang-up. This feature is turned on by default. The SMBus TIMEOUT is disabled by writing a ‘ ...

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... NXP Semiconductors 7.9 SMBus/I The data registers in this device are selected by the Pointer Register. At power-up, the Pointer Register is set to ‘00h’, the location for the Capability Register. The Pointer Register latches the last location to which it was set. Each data register falls into one of three types of user accessibility: • ...

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... NXP Semiconductors SCL SDA S START device address and write by host SCL D15 D14 D13 D12 SDA by host most significant byte data A = ACK = Acknowledge bit Write bit = Read bit = 1. 2 Fig 8. SMBus/I C-bus write to the Pointer Register followed by a write data word ...

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... NXP Semiconductors SCL SDA S START device address and read by host SCL D15 D14 D13 D12 SDA returned most significant byte data A = ACK = Acknowledge bit NACK = No Acknowledge bit Write bit = Read bit = 1. 2 Fig 10. SMBus/I C-bus word read from register with a pre-set pointer 7 ...

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... NXP Semiconductors 7.10.1 Write operations 7.10.1.1 Byte Write In Byte Write mode the master creates a START condition and then broadcasts the slave address, byte address, and data to be written. The slave acknowledges all 3 bytes by pulling down the SDA line during the ninth clock cycle following each byte. The master ...

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... NXP Semiconductors 7.10.1.3 Acknowledge polling Acknowledge polling can be used to determine if the SE97 is busy writing or is ready to accept commands. Polling is implemented by sending a ‘Selective Read’ command (described in acknowledge the slave address as long as internal write is in progress. 7.10.2 Memory Protection The lower half (the first 128 bytes) of the memory can be write protected by special EEPROM commands without an external control pin ...

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... NXP Semiconductors Up to eight memory devices can be connected on a single I 3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds when the 4-bit fixed and hardware selectable bits are matched. The 8th bit is the read/write bit. This bit is set for read and write protection, respectively. ...

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... NXP Semiconductors 7.10.2.2 Reversible Write Protection (RWP) and Clear Reversible Write Protection (CRWP) If the software write-protection has been set with the RWP instruction, it can be cleared again with a CRWP instruction. The two instructions, RWP and CRWP have the same format as a Byte Write instruction, ...

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... NXP Semiconductors 7.10.3 Read operations 7.10.3.1 Current address read In Standby mode, the SE97 internal address counter points to the data byte immediately following the last byte accessed by a previous operation. If the ‘previous’ byte was the last byte in memory, then the address counter will point to the first memory byte, and so on. If the SE97 decodes a slave address with a ‘ ...

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... NXP Semiconductors 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure 18). If the end of memory is reached during sequential Read, the address counter will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with either ‘ ...

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... NXP Semiconductors 8. Register descriptions 8.1 Register overview This section describes all the registers used in the SE97. The registers are used for latching the temperature reading, storing the low and high temperature limits, configuring, the hysteresis threshold and the ADC, as well as reporting status. The device uses the pointer register to access these registers ...

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... Capability Register (00h, 16-bit read-only) Table 8. Capability Register (address 00h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol RFU Default 0 Access R [1] SE97PW, SE97TK = 1; SE97PW/1, SE97TK Table 9. Bit 15:5 4 SE97_2 Product data sheet Memory module temp sensor with integrated SPD ...

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... NXP Semiconductors 8.3 Configuration Register (01h, 16-bit read/write) Table 10. Configuration Register (address 01h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol CTLB AWLB Default 0 Access R/W R/W Table 11. Bit 15:11 10:9 8 SE97_2 Product data sheet Memory module temp sensor with integrated SPD RFU ...

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... NXP Semiconductors Table 11. Bit SE97_2 Product data sheet Memory module temp sensor with integrated SPD Configuration Register (address 01h) bit description Symbol Description CTLB Critical Trip Lock bit. 0 — Critical Alarm Trip Register is not locked and can be altered (default) 1 — ...

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... NXP Semiconductors Table 12. Hysteresis Enable Action Below Alarm Window bit (bit 13) Temperature Threshold slope temperature sets falling lower alarm threshold hysteresis clears rising lower alarm threshold Above Critical Trip Above Alarm Window Below Alarm Window Fig 19. Hysteresis: how it works SE97_2 Product data sheet ...

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... NXP Semiconductors 8.4 Temperature format The temperature data from the temperature read back register is an 11-bit 2’s complement word with the least significant bit (LSB) equal to 0.125 C (resolution). • A value of 019Ch will represent 25.75 C • A value of 07C0h will represent 124 C • A value of 1E64h will represent 25.75 C. ...

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... NXP Semiconductors 8.5 Temperature Trip Point registers 8.5.1 Upper Boundary Alarm Trip Register (16-bit read/write) The value is the upper threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 C. ‘RFU’ bits will always report zero. Interrupts will respond to the presently programmed boundary values ...

Page 25

... NXP Semiconductors 8.5.2 Lower Boundary Alarm Trip Register (16-bit read/write) The value is the lower threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 C. RFU bits will always report zero. Interrupts will respond to the presently programmed boundary values. If boundary values are being altered in-system advised to turn off interrupts until a known state can be obtained to avoid superfl ...

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... NXP Semiconductors 8.6 Temperature Register (16-bit read-only) Table 20. Bit Symbol Default Access Bit Symbol Default Access Table 21. Bit 11:1 0 8.7 Manufacturer’s ID register (16-bit read-only) The SE97 Manufacturer’s ID register is intended to match Philips PCI-SIG (1131h). Table 22. Bit Symbol Default Access Bit Symbol ...

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... NXP Semiconductors 8.8 Device ID register The SE97 device ID and device revision are A1h and 00h, respectively. Table 23. Bit Symbol Default Access Bit Symbol Default Access 8.9 SMBus register Table 24. Bit Symbol Default Access Bit Symbol Default Access Table 25. Bit 15:8 7 6:1 0 SE97_2 Product data sheet ...

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... NXP Semiconductors 9. Application design-in information In a typical application, the SE97 behaves as a slave device and interfaces to a bus master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host, and asserts when the temperature reading exceeds the programmed values in the alarm registers ...

Page 29

... NXP Semiconductors 9.1 SE97 in memory module application Figure 22 centered in the memory module to monitor the temperature of the DRAM and also to provide a 2-kbit EEPROM as the Serial Presence Detect (SPD). In the event of overheating, the SE97 triggers the EVENT output and the memory controller throttles the memory bus to slow the DRAM ...

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... NXP Semiconductors V OL(SDA) V OL(EVENT) I OL(sink)(SDA) I OL(sink)EVENT Calculation example: T amb I DD(AV 3 Maximum V I OL(sink)(SDA) V OL(EVENT) I OL(sink)EVENT R th(j-a) R th(j-a) Self heating due to power dissipation for HVSON8 is Self heating due to power dissipation for TSSOP8 is 160 10. Limiting values Table 26. In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 31

... NXP Semiconductors 11. Characteristics Table 27. Characteristics +125 C; unless otherwise specified. DD amb Symbol Parameter T temperature limit accuracy lim(acc) T temperature resolution res T conversion period conv E conversion rate error f(conv) Table 28. DC characteristics +125 C; unless otherwise specified. These specifications are guaranteed by design. ...

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... NXP Semiconductors 500 I DD(AV 400 V DD 300 200 100 C-bus and EEPROM inactive. Fig 23. Average supply current 600 I DD(AV 500 V DD 400 300 200 Temp sensor and EEPROM active. Fig 25. Average supply current during EEPROM write 8 (mA) 6 ...

Page 33

... NXP Semiconductors 15 conversion rate (conv Fig 29. Conversion rate 5 T cy(W) ( Fig 31. EEPROM write cycle time 1 (V) 1.4 1.2 1 For EEPROM read operation. Fig 33. Average power-on threshold voltage SE97_2 Product data sheet ...

Page 34

... NXP Semiconductors temp error 150 mV (p-p); 0 coupling capacitor; no decoupling capacitor Fig 35. Temperature error versus power supply noise frequency Table 29. SMBus AC characteristics +125 C; unless otherwise specified. These specifications are guaranteed by design. DD amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to 400 kHz ...

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... NXP Semiconductors Table 29. SMBus AC characteristics +125 C; unless otherwise specified. These specifications are guaranteed by design. DD amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to 400 kHz. Symbol ...

Page 36

... NXP Semiconductors 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 37

... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0 0.2 0.00 0.2 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 38

... NXP Semiconductors 13. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 39

... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 40

... NXP Semiconductors Fig 39. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 32. Acronym ADC ARA CDM CPU DDR DIMM DRAM EEPROM ESD HBM 2 I C-bus ...

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... NXP Semiconductors Table 32. Acronym SMBus SO-DIMM SPD 15. Revision history Table 33. Revision history Document ID Release date SE97_2 20071012 • Modifications: Section 1 “General st – 1 “provides 256 bytes of EEPROM memory” nd – 2 “Placing the Temp Sensor (TS DIMM” nd – 2 temperature” th – 4 between 0.9 V and 3.6 V“ ...

Page 42

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 43

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 General features . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Temperature sensor features . . . . . . . . . . . . . . 2 2.3 Serial EEPROM features . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Serial bus interface . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.3 EVENT output 7.3.1 Alarm window . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 ...

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