W83627G Winbond Electronics Corp America, W83627G Datasheet
W83627G
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W83627G Summary of contents
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W83627HF/F W83627HG/G Winbond LPC I/O Date： 2006/06/09 Revision： 2.27 ...
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... Add Block Digram Add the top marking of W83627HG and W83627G. Typo and data correction. Data correction. Data correction. Data correction. Add part No.to Section 13 Ordering Instruction and data correction. Add pin configuration of W83627G & W83627HG Publication Release Date: June 09, 2006 - i - DESCRIPTION Revision 2.27 ...
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Table of Content- 1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 3 3. BLOCK DIAGRAM FOR W83627F............................................................................................. 6 4. BLOCK DIAGRAM FOR W83627HF .......................................................................................... 7 5. PIN CONFIGURATION ............................................................................................................... 8 6. PIN DESCRIPTION................................................................................................................... 12 6.1 LPC Interface ............................................................................................................... 13 6.2 ...
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REGISTERS AND RAM............................................................................................... 42 8. SERIAL IRQ .............................................................................................................................. 76 8.1 Start Frame .................................................................................................................. 76 8.2 IRQ/Data Frame........................................................................................................... 76 8.3 Stop Frame .................................................................................................................. 77 9. CONFIGURATION REGISTER ................................................................................................ 78 9.1 Plug and Play Configuration ........................................................................................ 78 9.1.1 Compatible PnP..............................................................................................................78 9.1.2 ...
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GENERAL DESCRIPTION The W83627HF and W83627F are evolving product from Winbond's most popular I/O family. They feature a whole new interface, namely LPC（Low Pin Count）interface, which will be supported in the next generation Intel chip-set. This interface as its ...
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The W83627F/HF contains a game port and a MIDI port. The game port is designed to support 2 joy- sticks and can be applied to all standard PC game control devices, They are very important for a en- tertainment or ...
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FEATURES General • Meet LPC Spec. 1.0 • Support LDRQ#（LPC DMA）, SERIRQ （serial IRQ） • Include all the features of Winbond I/O W83977TF and W83977EF • Integrate Hardware Monitor functions • Compliant with Microsoft PC98/PC99 Hardware Design Guide • ...
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Internal diagnostic capabilities： ─ Loop-back controls for communications link fault isolation ─ Break, parity, overrun, framing error simulation • Programmable baud generator allows division of 1.8461 MHz and 24 MHz （2 • Maximum baud rate up ...
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MIDI Port • The baud rate is 31.25 Kbaud • 16-byte input FIFO • 16-byte output FIFO General Purpose I/O Ports • 22 programmable general purpose I/O ports • General purpose I/O ports can serve as simple I/O ports, interrupt ...
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BLOCK DIAGRAM FOR W83627F LRESET#, LCLK, LFRAME#, LAD[3:0], LDRQ#, SERIRQ Joystick interface signals MSI MSO General-purpose I/O pins Keyboard/Mouse data and clock W83627HF/ F/ HG/ G LPC Interface Game FDC Port MIDI URA, B GPIO IR KBC CIR ACPI ...
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BLOCK DIAGRAM FOR W83627HF LRESET#, LCLK, LFRAME#, LAD[3:0], LDRQ#, SERIRQ Joystick interface signals MSI MSO General-purpose I/O pins Keyboard/Mouse data and clock Hardware monitor channel and Vref W83627HF/ F/ HG/ G LPC Interface Game FDC Port MIDI URA, B ...
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... PIN CONFIGURATION Pin configuration of W83627F and W83627G 103 NC 104 NC NC 105 106 NC 107 NC 108 NC 109 NC 110 NC 111 NC 112 NC NC 113 VCC 114 115 NC 116 NC 117 VSS 118 NC 119 MSI/GP20 120 MSO/IRQIN0 121 ...
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... W83627G W83627G ...
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PIN CONFIGURATION of W83627HF and W83627HG VTIN2 103 ...
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...
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PIN DESCRIPTION TYPE I/O TTL level bi-directional pin with 8mA source-sink capability 8t I/O TTL level bi-directional pin with 12mA source-sink capability 12t I/O TTL level bi-directional pin with 24 mA source-sink capability 24t I/O 3.3V TTL level bi-directional ...
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PIN DESCRIPTION, continued. TYPE IN TTL level input pin t IN 3.3V TTL level input pin tp3 IN TTL level input pin with internal pull down resistor td IN TTL level input pin with internal pull up resistor tu IN ...
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FDC Interface SYMBOL PIN I/O DRVDEN0 1 OD DRVDEN1 2 OD12 SMI# OD12 IRQIN1 INt GP27 I/OD12t INDEX csu MOA DSB FANIN3 I/O 24ts DSA MOB FANPWM3 OD DIR# ...
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FDC Interface, continued. SYMBOL PIN I/O RDATA csu HEAD DSKCHG csu 6.3 Multi-Mode Parallel Port The following pins have alternate functions (Printer Mode and Extension FDD Mode), which are se- lected by CR28 and ...
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Multi-Mode Parallel Port, continued. SYMBOL PIN BUSY 33 MOB2# OD ACK# 34 DSB2# OD PD7 35 I/O DSA2# OD I/O IN PRINTER MODE： active high input indicates that the printer is not ready to receive data. Refer to ...
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Multi-Mode Parallel Port, continued. SYMBOL PIN PD6 36 I/O MOA2# OD PD5 37 I/O PD4 38 I/O DSKCHG2# PD3 39 I/O RDATA2# I/O PRINTER MODE： PD6 12ts Parallel port data bus bit 6. Refer to the description of the parallel ...
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Multi-Mode Parallel Port, continued. SYMBOL PIN PD2 40 I/O WP2# PD1 41 I/O TRAK02# PD0 42 I/O INDEX2# I/O PRINTER MODE： PD2 12ts Parallel port data bus bit 2. Refer to the description of the parallel port for the definition ...
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Multi-Mode Parallel Port, continued. SYMBOL PIN SLIN STEP2# OD INIT DIR2# OD ERR# 45 HEAD2# OD I/O PRINTER MODE： SLIN# 12 Output line for detection of printer selection. Refer to the de- scription of the parallel ...
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Multi-Mode Parallel Port, continued. SYMBOL PIN AFD DRVDEN0 OD STB I/O PRINTER MODE： active low output from this pin causes the printer to auto feed a line after a line is printed. Refer to ...
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Serial Port Interface SYMBOL PIN I/O CTSA CTSB# 78 DSRA DSRB# 79 RTSA HEFRAS cd DTRA PNPCVS RTSB DTRB ...
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KBC Interface SYMBOL PIN I/O KBLOCK GA20M KBRST KCLK 62 I/OD 16ts I/OD 16cs KDAT 63 I/OD 16ts I/OD 16cs MCLK 65 I/OD 16ts I/OD 16cs MDAT 66 I/OD 16ts ...
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Hardware Monitor Interface （For W83627HF only, all these pins in W83627F are NC.） SYMBOL PIN I CASEOPEN# -5VIN 94 AIN -12VIN 95 AIN +12VIN 96 AIN +3.3VIN 98 AIN VCOREB 99 AIN VCOREA 100 AIN VREF 101 ...
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Game Port & MIDI Port SYMBOL PIN I/O MSI 119 INtu GP20 I/OD MSO 120 O 8C IRQIN0 Inc GPSA2 121 INcsu GP17 I/OD 12csu GPSB2 122 INcsu GP16 I/OD 12csu GPY1 123 I/OD 12csd I/OD GP15 12cs GPY2 ...
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General Purpose I/O Port 6.9.1 General Purpose I/O Port 1 （Power source is Vcc） See section 7.8 6.9.2 General Purpose I/O Port 2 （Power source is Vcc） SYMBOL PIN I/O GP20 119 I/OD MSI IN GP21 92 I/OD SCL ...
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General Purpose I/O Port 3 （Power souce is VSB） SYMBOL PIN GP30 73 SLP_SX# GP31 72 PWRCTL# GP32 71 PWROK GP33 70 RSMRST# GP34 69 CIRRX# GP35 64 SUSLED 6.10 POWER PINS SYMBOL PIN VCC 12, 48, 77, 114 ...
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HARDWARE MONITOR 7.1 General Description The W83627HF can be used to monitor several critical hardware parameters of the system, including power supply voltages, fan speeds, and temperatures, which are very important for a high-end com- puter system to work ...
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ISA ISA ISA ISA Data Data Address Address Bus Bus Bus Bus Port 5h Port 5h Index Index Register Register Port 6h Port 6h Data Data Register Register Figure 8.1 ： ISA interface access diagram W83627HF/ F/ HG/ G Configuration ...
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I C interface 2 The second interface uses I C Serial Bus. W83627HF hardware monitor has three serial bus address. That is, the first address defined at CR[48h] can read/write all registers excluding Bank 1 and Bank 2 ...
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The serial bus timing of the temperature 2 and 3 are shown as follow： (a) Typical 2-byte read from preset pointer location 0 SCL SDA Start By Master Frame 1 Serial Bus Address Byte ...
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Typical pointer set followed by immediate read from configuration register 0 SCL SDA Start By Master Frame 1 Serial Bus Address By (e) Temperature 2/3 configuration register Write 0 SCL SDA ...
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Analog Inputs The maximum input voltage of the analog pin is 4.096V because the 8-bit ADC has a 16mv LSB. Really, the application of the PC monitoring would most often be connected to power suppliers. The CPU V-core voltage, ...
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The Pin 61 is connected to 5VSB voltage. W83627HF monitors this voltage and the internal two serial resistors are 17K Ω and 33K Ω so that input voltage to ADC is 3.3V which less than 4.096V of ADC maximum input ...
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Temperature Measurement Machine The temperature data format is 8-bit two's-complement for sensor 2 and 9-bit two's-complement for sensor 1. The 8-bit temperature data can be obtained by reading the CR[27h]. The 9-bit temperature data can be obtained by reading ...
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Bipolar Transistor Temperature Sensor C B 2N3904 E OR Pentium II CPU Therminal Diode 7.4 FAN Speed Count and FAN Speed Control 7.4.1 Fan speed count Inputs are provides for signals from fans equipped with tachometer outputs. The level of ...
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NOMINAL DIVISOR PRM 1 8800 2 （default） 4400 4 2200 8 1100 16 550 32 275 64 137 128 68 +12V +5V Pull-up resister 4.7K Ohms diode +12V Fan Input FAN Out Pin 111-113 GND W83627HF FAN Connector Fan with ...
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Fan speed control The W83627HF provides 2 sets for fan PWM speed control. The duty cycle of PWM can be pro- grammed by a 8-bit registers which are defined in the Bank0 CR5A and CR5B. The default duty cycle ...
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SMI# interrupt mode 7.5.1 Voltage SMI# mode： SMI# interrupt for voltage is Two-Times Interrupt Mode. Voltage exceeding high limit or going below low limit will causes an interrupt if the previous interrupt has been reset by reading all the ...
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Temperature 1 SMI# modes The W83627HF temperature sensor 1 SMI# interrupt has two modes （1）Comparator Interrupt Mode Setting the T （Temperature Hysteresis） limit to 127°C will set temperature sensor 1 SMI# HYST to the Comparator Interrupt Mode. Temperature exceeds ...
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Temperature 2, 3 SMI# modes： The W83627HF temperature sensor 2 and sensor 3 SMI# interrupt has two modes and it is pro- grammed at CR[4Ch] bit 6. （1）Comparator Interrupt Mode Temperature exceeding TO causes an interrupt and this interrupt ...
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OVT# interrupt mode The W83627HF OVT# signal is only related to temperature sensor 2 and 3（VTIN2 / VTIN3）. They have two modes： （1）Comparator Mode： Setting Bank1/2 CR[52h] bit will set OVT# signal to comparator mode. Temperature ...
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REGISTERS AND RAM Address Register （Port x5h） Data Port： Power on Default Value Attribute： Size： Bit7： Read Only The logical 1 indicates the device is busy because of a Serial Bus transaction or another LPC bus transaction. With checking ...
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Address Pointer Index （A6-A0） REGISTERS AND RAM Configuration Register Interrupt Status Register 1 Interrupt Status Register 2 SMI#Ý Mask Register 1 SMIÝ Mask Register 2 NMI Mask Register 1 NMI Mask Register 2 VID/Fan Divisor Register Serial Bus Address Regis- ...
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Address Pointer Index （ A6-A0 ） , continued REGISTERS AND RAM Winbond Vendor ID Regis- ter POST RAM Value RAM Value RAM Temperature 2 Registers Temperature 3 Registers Additional Configuration Registers Data Register （Port x6h） Data Port： Power on Default ...
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Configuration Register - Index 40h Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： A one restores power on default value to all registers except the Serial Bus Address register. This bit clears itself since the power on ...
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Bit 7： A one indicates the fan count limit of FAN2 has been exceeded. Bit 6： A one indicates the fan count limit of FAN1 has been exceeded. Bit 5： A one indicates a High limit of VTIN2 has been ...
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SMI# Mask Register 1 - Index 43h Register Location： Power on Default Value： Attribute： Size： 7 Bit 7-0： A one disables the corresponding interrupt status bit for SMI interrupt. SMI# Mask Register 2 - Index 44h Register Location： Power on ...
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Reserved Register - Index 45h This register is reserved. Chassis Clear Register - Index 46h （Not available for A Version） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Clear Chassis Intrusion Event. Write “1” will make Hardware ...
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Bit 5-4： FAN1 Speed Control. Bit 3-0： The VID <3：0> inputs Note: Please refer to Bank0 CR[5Dh] , Fan divisor table. Serial Bus Address Register - Index 48h Register Location： Power on Default Value： Size： Bit 7： Read ...
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Value RAM ⎯ Index 20h- 3Fh or 60h - 7Fh （ auto-increment ） , continued ADDRESS A6-A0 WITH ADDRESS A6-A0 AUTO-INCREMENT 2Ah 2Bh 2Ch 2Dh 2Eh 2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch ...
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Register Location： Power on Default Value： Size： 7 Bit 7-1： Read Only - Device ID<6：0> Bit 0 ： Read/Write - The VID4 inputs. Temperature 2 and Temperature 3 Serial Bus Address Register - Index 4Ah Register Location： Power on Default ...
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Pin Control Register - Index 4Bh Register Location： Power on Default Value： Attribute： Size： 7 Bit 7-6：Fan3 speed divisor. Please refer to Bank0 CR[5Dh] , Fan divisor table. Bit 5-4：Select A/D Converter Clock Input. <5：4> default. ADC ...
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IRQ/OVT# Property Select Register - Index 4Ch Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Reserved. User Defined. Bit 6： Set to 1, the SMI# output type of Temperature 2 and 3 is set to Comparator Interrupt ...
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FAN IN/OUT and BEEP Control Register- Index 4Dh Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Disable power-on abnormal the monitor voltage including V-Core A and +3.3V. If these voltage exceed the limit value, the pin （Open ...
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Register 50h ~ 5Fh Bank Select Register - Index 4Eh （No Auto Increase） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： HBACS- High byte access. Set to 1, access Register 4Fh high byte register. Set to 0, ...
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Winbond Test Register - Index 50h ~ 55h （Bank 0） These registers are reserved for Winbond internal use. BEEP Control Register 1 - Index 56h （Bank 0） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Enable BEEP ...
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BEEP Control Register 2 - Index 57h （Bank 0） Register Location： 57h Power on Default Value： 80h Attribute： Read/Write Size： 8 bits 7 Bit 7： Enable Global BEEP. Write 1, enable global BEEP output. Default 1. Write 0, disable all ...
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Chip ID Register - Index 58h （Bank 0） Register Location： Power on Default Value： Attribute： Size： Bit 7： Winbond Chip ID number. Read this register will return 21h. Reserved Register - Index 59h （Bank 0） Register Location： Power ...
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PWMOUT1 Control Register - Index 5Ah （Bank 0） Register Location： Power on default value： Attribute： Size： Bit 7： PWMOUT1 duty cycle control Write FF, Duty cycle is 100%, Write 00, Duty cycle is 0%. PWMOUT2 Control Register - ...
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PWMOUT1/2 Clock Select Register - Index 5Ch （Bank 0） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Reserved Bit 6-4： PWMOUT2 clock selection. The clock defined frequency is same as PWMOUT1 clock selec- tion. Bit 3： Reserved ...
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VBAT Monitor Control Register - Index 5Dh （Bank 0） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： Fan3 divisor Bit 2. Bit 6： Fan2 divisor Bit 2. Bit 5： Fan1 divisor Bit 2. Bit 4： Reserved. Bit ...
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Reserved Register - Index 5Eh （Bank 0） This register is reserved. Reserved Register - Index 5Fh （Bank 0） This register is reserved. VTIN2 Reading（High Byte） - Index 50h （Bank 1） Register Location： 50h Attribute： Read Only Size： 8 bits 7 ...
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VTIN2 Configuration Register - Index 52h （Bank 1） Register Location： Power on Default Value Size： 7 Bit 7-5： Read - Reserved. This bit should be set to 0. Bit 4-3： Read/Write - Number of faults to detect before setting OVT# ...
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VTIN2 Hysteresis （Low Byte） Register - Index 54h （Bank 1） Register Location： Power on Default Value Attribute： Size： 7 Bit 7： Hysteresis temperature bit 0, which is low Byte. Bit 6-0： Reserved. VTIN2 Over-temperature（High Byte）Register - Index 55h （Bank 1） ...
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VTIN2 Over-temperature（Low Byte）Register - Index 56h （Bank 1） Register Location： Power on Default Value Attribute： Size： 7 Bit 7： Over-temperature bit 0, which is low Byte. Bit 6-0： Reserved. VTIN3 Reading（High Byte）Register - Index 50h （Bank 2） Register Location： 50h ...
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VTIN3 Reading（Low Byte）Register - Index 51h （Bank 2） Register Location： 51h Attribute： Read Only Size： 8 bits 7 Bit 7： Temperature <0> of sensor2, which is low byte. Bit 6-0： Reserved. VTIN3 Configuration Register - Index 52h （Bank 2） Register ...
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VTIN3 Hysteresis（High Byte）Register - Index 53h （Bank 2） Register Location： Power on Default Value： Attribute： Size： Bit 7-0： Temperature hysteresis bit 8-1, which is High Byte. The temperature default 75 degree C. VTIN3 Hysteresis（Low Byte）Register - Index 54h ...
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VTIN3 Over-temperature（High Byte）Register - Index 55h （Bank 2） Register Location： Power on Default Value： Attribute： Size： Bit 7-0： Over-temperature bit 8-1, which is High Byte. The temperature default 80 degree C. VTIN3 Over-temperature（Low Byte）Register - Index 56h（Bank 2） ...
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Interrupt Status Register 3 - Index 50h （BANK4） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7-2： Reserved. Bit 1： A one indicates a High or Low limit of VBAT has been exceeded. Bit 0： A one indicates ...
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Reserved Register - Index 52h （Bank 4） This register is reserved for Winbond internal use. BEEP Control Register 3 - Index 53h （Bank 4） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7-6： Reserved. Bit 5： User define ...
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Temperature Sensor 2 Offset Register - Index 55h （Bank 4） Register Location： Power on Default Value： Attribute： Size： Bit 7-0：Temperature 2 base temperature. The temperature is added by both monitor value and offset value. Temperature Sensor 3 Offset ...
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Real Time Hardware Status Register I - Index 59h （Bank 4） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7： FAN 2 Status. Set 1, the fan speed counter is over the limit value. Set 0, the fan ...
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Real Time Hardware Status Register II - Index 5Ah （Bank 4） Register Location： Power on Default Value： Attribute： Size： 7 Bit 7-6： Reserved Bit 5： Temperature sensor 3 Status. Set 1, the voltage of temperature sensor is over the limit ...
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Bit 7-2： Reserved. Bit 1： VBAT Voltage Status. Set 1, the voltage of VBAT is over the limit value. Set 0, the voltage of VBAT is during the limit range. Bit 0： 5VSB Voltage Status. Set 1, the voltage ...
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Value RAM 2⎯ Index 50h - 5Ah （auto-increment） ADDRESS A6-A0 AUTO-INCREMENT 50h 51h 52h 53h 54h 55h 56h 57h Winbond Test Register - Index 50h （Bank 6） This register is reserved for Winbond internal use. W83627HF/ F/ HG/ G BANK ...
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SERIAL IRQ W83627HF supports a serial IRQ scheme. This allows a signal line to be used to report the legacy ISA interrupt rerquests. Because more than one device may need to share the signal serial IRQ signal line, an ...
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IRQ/DATA FRAME 32：22 8.3 Stop Frame After all IRQ/Data Frames have completed, the host controller will terminate IRQSER by ...
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CONFIGURATION REGISTER 9.1 Plug and Play Configuration The W83627HF/F uses Compatible PNP protocol to access configuration registers for setting up dif- ferent types of configurations. In W83627HF/F, there are eleven Logical Devices（from Logical De- vice 0 to Logical Device ...
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The designer can also set bit 5 of CR26（LOCKREG）to high to protect the configura- tion registers against accidental accesses. The configuration registers can be reset to their default or hardware settings only by a cold reset （pin MR ...
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Exit the extended function mode To exit the extended function mode, one write of 0xAA to EFER is required. Once the chip exits the extended function mode the normal running mode and is ready to enter ...
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Chip（Global）Control Register CR02 （Default 0x00） BIT Reserved. 0 SWRST --> Soft Reset. CR07 Bit ： Logical Device Number CR20 Bit ： Device ID = 0x52 （read only）. CR21 Bit 7 ...
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CR23 （Default 0x00） BIT Reserved. 0 IPD （Immediate Power Down）. When set will put the whole chip into power down mode immediately. CR24 （Default 0b1s000s0s） BIT 7 EN16SA 0： 12 bit Address Qualification 1： ...
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CR26 （Default 0b0s000000） BIT 7 SEL4FDD 0： Select two FDD mode. 1： Select four FDD mode. 6 HEFRAS These two bits define how to enable Configuration mode. The corresponding power-on setting pin is NRTSA （pin 51）. HEFRAS Address and Value ...
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CR28 （Default 0x00） BIT Reserved PRTMODS2 - PRTMODS0 0xx： Parallel Port Mode 100： Reserved 101： External FDC Mode 110： Reserved 111： External two FDC Mode CR29 （GPIO3 multiplexed pin selection register. VBAT powered. Default ...
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CR2A （GPIO multiplexed pin selection register 1. VCC powered. Default 0X7C） BIT 7 Port Select（select Game Port or General Purpose I/O Port 1） 0： Game Port 1： General Purpose I/O Port 1（pin121~128 select function GP10~GP17 or KBC Port 1） 6 ...
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CR2B（GPIO multiplexed pin selection register 2. VCC powered. Default 0XC0） BIT 7 PIN92S 0： SCL 1： GP21 6 PIN91S 0： SDA 1： GP22 5 PIN90S 0： PLED （PLED0 control bits are in CRF5 of Logical Device 8） 1： GP23 4 ...
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Logical Device 0 （FDC） CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved. 0 Logic device activation control 1： Active 0： Inactived CR60 （Default 0x03, 0xf0 if PNPCVS = ...
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CRF0 （Default 0x0E） FDD Mode Register BIT 7 FIPURDWN This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX, TRAK0, DSKCHG, and WP. 0： The internal pull-up resistors of FDC are turned on.（Default） 1： The internal ...
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CRF1 （Default 0x00） BIT Boot Floppy 00： FDD A 01： FDD B 10： FDD C 11： FDD Media ID1, Media ID0. These bits will be reflected on FDC's Tape Drive Register bit 7, ...
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CRF4 （Default 0x00） FDD0 Selection： BIT 7 Reserved. 6 Precomp. Disable. 1： Disable FDC Precompensation. 0： Enable FDC Precompensation. 5 Reserved DRTS1, DRTS0： Data Rate Table select （Refer to TABLE A）. 00： Select Regular drives and 2.88 ...
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DTYPE1 DRVDEN0（pin 1） DRVDEN1（pin 2） DTYPE0 9.4 Logical Device 1 （Parallel Port） CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved. 0 Logic device ...
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CRF0 （Default 0x3F） BIT 7 Reserved ECP FIFO Threshold Parallel Port Mode （CR28 PRTMODS2 = 0） 100：Printer Mode （Default） 000：Standard and Bi-direction（SPP）mode 001：EPP - 1.9 and SPP mode 101：EPP - 1.7 and SPP mode ...
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Logical Device 2 （UART A） CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved. 0 Logic device activation control 1： Active 0： Inactived CR60 （Default 0x03, 0xF8 if PNPCVS ...
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Logical Device 3 （UART B） CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved. 0 Logic device activation control 1： Active 0： Inactived CR60 （Default 0x02, 0xF8 if PNPCVS ...
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CRF1 （Default 0x00） BIT 7 Reserved. 6 IRLOCSEL. IR I/O pins' location select. 0： Through SINB/SOUTB. 1： Through IRRX/IRTX. 5 IRMODE2. IR function mode selection bit 2. 4 IRMODE1. IR function mode selection bit 1. 3 IRMODE0. IR function mode ...
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Logical Device 5 （KBC） CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved. 0 Logic device activation control. 1： Active 0： Inactived CR60 （Default 0x00, 0x60 if PNPCVS = ...
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Logical Device 6 （CIR） CR30 （Default 0x00） BIT Reserved. 0 Logic device activation control 1： Active 0： Inactived CR60 （Default 0x00, 0x00） These two registers select CIR I/O base address [0x100：0xFF8 byte ...
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CR70 （Default 0x09 if PNPCVS = 0 during POR, default 0x00 otherwise） BIT Reserved These bits select IRQ resource for MIDI Port. CRF0 （GP10-GP17 I/O selection register. Default 0xFF） When set to a '1', ...
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CRF3 （Default 0x00） BIT These bits select IRQ resource for IRQIN1 These bits select IRQ resource for IRQIN0. CRF4 （Reserved） This register is reserved.. CRF5 （PLED mode register. Default 0x00） BIT ...
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CRF7 （Default 0x00） BIT 7 Mouse interrupt reset Enable or Disable 1： Watch Dog Timer is reset upon a Mouse interrupt 0： Watch Dog Timer is not affected by Mouse interrupt 6 Keyboard interrupt reset Enable or Disable 1： Watch ...
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CRF3 （SUSLED mode register. Default 0x00） BIT 7-6 Select Suspend LED mode.（VSB powered） 00： Suspend LED pin is drived low. 01： Suspend LED pin is tri-stated. 10： Suspend LED pin is a 1Hz toggle pulse with 50 duty cycle. 11： ...
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CRE0 （ Default 0x00 ） , continued BIT 3 ENCIRWAKEUP. Enable CIR to wake-up system via PANSW_OUT. 0： Disable CIR wake-up function. 1： Enable CIR wake-up function. 2 KB/MS Swap. Enable Keyboard/Mouse port-swap. 0： Keyboard/Mouse ports are not swapped. 1： ...
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CRE3 Keyboard/Mouse Wake-Up Status Register（Read Only） BIT 7-6 Reserved. 5 When 1 is VSB Power Loss status. 4 PWRLOSS_STS. This bit is set when power loss occurs. This bit is control by CRE4[7] 3 CIR_STS. The Panel switch event is ...
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CRE5 （Default 0x00） BIT 7 Reserved Compared Code Length. When the compared codes are storaged in the data register, these data length should be written to this register. CRE6 （Default 0x00） BIT 7 Reserved 6 Chassis Status ...
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CRF0 （Default 0x00） BIT 7 CHIPPME. Chip level auto power management enable. 0： Disable the auto power management functions 1： Enable the auto power management functions. 6 CIRPME. Consumer IR port auto power management enable. 0： Disable the auto power ...
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CRF3 （Default 0x00） BIT Reserved. Return zero when read Device's IRQ status. These bits indicate the IRQ status of the individual device respectively. The device's IRQ status bit is set by their source device ...
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CRF6 （ Default 0x00 ） , continued. BIT 4 KBCIRQEN. 0： Disable the generation of an SMI / 1： Enable the generation of an SMI / 3 PRTIRQEN. 0： Disable the generation of an SMI / 1： Enable the generation ...
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CRF7 （ Default 0x00 ） , continued BIT 1 IRQIN1EN. 0： Disable the generation of an SMI / 1： Enable the generation of an SMI / 0 IRQIN0EN. 0： Disable the generation of an SMI / 1： Enable the generation ...
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CR70 （Default 0x00） BIT Reserved These bits select IRQ resource for Hardware Monitor. CRF0 （Default 0x00） BIT Reserved. 0 Disable initial abnormal beep （VcoreA and +3.3 V） 0： Enable power-on abnormal ...
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SPECIFICATIONS 10.1 Absolute Maximum Ratings PARAMETER Power Supply Voltage （5V） Input Voltage RTC Battery Voltage V BAT Operating Temperature Storage Temperature Note： Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability ...
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DC CHARACTERISTICS, continued. PARAMETER SYM. I/O - TTL level bi-directional pin with 24mA source-sink capability 24t Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage I/O – 3.3V TTL level bi-directional ...
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DC CHARACTERISTICS, continued. PARAMETER SYM. Input Low Leakage I/O – 3.3V TTL level Schmitt-trigger bi-directional pin with 24mA source-sink capability 24tsp3 Input Low Threshold Voltage Input High Threshold Voltage Hystersis Output Low Voltage Output High Voltage Input High Leakage Input ...
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DC CHARACTERISTICS, continued. PARAMETER SYM. I/OD - TTL level Schmitt-trigger bi-directional pin and open drain output with 24mA sink 24ts capability Input Low Threshold Voltage Input High Threshold Voltage Hystersis Output Low Voltage Input High Leakage Input Low Leakage I/OD ...
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DC CHARACTERISTICS, continued. PARAMETER SYM. I/OD - CMOS level Schmitt-trigger bi-directional pin with internal pull down resistor and 12 csd open drain output with 12mA sink capability Input Low Threshold Voltage Input High Threshold Voltage Hystersis Output Low Voltage Input ...
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DC CHARACTERISTICS, continued. PARAMETER SYM Output pin with 24mA source-sink capability 24 Output Low Voltage Output High Voltage O - 3.3V output pin with 12mA source-sink capability 12p3 Output Low Voltage O - 3.3V output pin with 24mA ...
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DC CHARACTERISTICS, continued. PARAMETER SYM TTL level input pin with internal pull up resistor tu Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage IN - TTL level Schmitt-trigger input pin ts Input Low Threshold ...
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DC CHARACTERISTICS, continued. PARAMETER SYM CMOS level Schmitt-trigger input pin cs Input Low Threshold Volt- age Hystersis Input High Leakage Input Low Leakage IN - CMOS level Schmitt-trigger input pin with internal pull up resistor csu Input Low ...
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APPLICATION CIRCUITS 11.1 Parallel Port Extension FDD 13 WE2/SLCT 25 12 WD2/ MOB2/BUSY 23 10 DSB2/ACK 22 9 PD7 21 8 PD6 20 7 PD5 19 6 DCH2/PD4 18 RDD2/PD3 5 17 STEP2/SLIN 4 WP2/PD2 16 DIR2/INIT ...
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Four FDD Mode W83627HF/ F/ HG/ G Publication Release Date: June 09, 2006 - 119 - Revision 2.27 ...
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... AM. MEGA. 87-96 821A2B282012345BC 1st line： Winbond logo 2nd line： the type number： W83627HF-AW, W83627F-AW, W83627HG-AW, W83627G-AW （the “G” means Pb-free package） 3rd line： the source of KBC F/W -- American Megatrends Incorporated 4th line： the tracking code 821 282012345BC 821： ...
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PACKAGE DIMENSIONS （128-pin QFP） 102 103 128 See Detail F y Seating Plane Detail F - 121 ...
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APPENDIX A ： DEMO CIRCUIT PLED R10 4.7K VCC3V SMBDATA R11 4.7K VCC3V SMBCLK -5VIN -12VIN +12VIN Voltage SENSING +3.3VIN VCOREB VCOREA VREF Temperature Sensing VTIN3 AVCC C5 CAP NP 0.1u AGND (To monitor battery voltage, BAT this input ...
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SUSPEND LED CIRCUIT R25 NPN IOVSB 150 LED SUSLED POWER LED CIRCUIT D4 Q2 R27 R NPN VCC 150 LED R28 R VCC 4.7K PLED BATTERY CIRCUIT VBAT BT1 R16 BATTERY 1K C13 0.1UF JP4 JP5:1-2 Clear ...
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COM PORT VCC +12V VCC +12V 16 5 NRTSA RTSA# DA1 DY1 15 6 NDTRA DTRA# DA2 DY2 13 8 NSOUTA SOUTA DA3 DY3 19 2 NRIA RIA# RY1 RA1 18 3 NCTSA CTSA# RY2 RA2 17 ...
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GAME & MIDI PORT CIRCUIT MSI GPSA2 GPSB2 GPY1 GPY2 MSO GPX2 GPX1 GPSB1 GPSA1 R38 R37 R36 CAP NP CAP NP CAP NP CAP NP 0.01U 0.01U 0.01U 0.01U C39 C37 C36 C38 ...
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Hardware Monitor circuits Temperature Sensing 10K 1% RT2 R61 10K 1% VREF (for other) THERMISTOR RT1 10K 1% R62 10K 1% (for system) THERMISTOR VTIN3 VTIN1 R60 30K D+ D+ (from Deschutes VTIN2 AGND C43 CAPACITOR NON-POL 3300p ...
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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instru- ments, airplane or spaceship instruments, transportation instruments, traffic signal instru- ments, combustion control instruments, or ...