tc9444f TOSHIBA Semiconductor CORPORATION, tc9444f Datasheet
tc9444f
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tc9444f Summary of contents
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... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic Single-Chip karaoke IC II The TC9444F is a karaoke chip for such applications as equipment for CD/LD players, mini component stereo sets, radio-cassette players, and VTRs. With its internal AD/DA converter system, the TC9444F can offer such karaoke functions as echo, vocal canceling, and key ...
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DD2 V RESET IFSEL CS SCL SDA EMP TEST GNDD2 EXT7 EXT8 EXT9 EXTA EXTB EXTC EXT1 EXT0 GNDD1 GNDX XI XO Selector GNDAR AOR VRR DA2 V VRL AOL GNDAL ...
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... MCKO output clock selection (“H” = 1/1, “L” = 1/2 divider) 37 MCKS I 38 MCKO O System clock output ¾ Digital power supply 1 DD1 40 SDO O Digital audio data output 41 BCKO O Bit clock output 42 LRCKO O Channel clock output 43 SDI I Digital audio data input Function Schmitt input Schmitt input Schmitt input 3 TC9444F Remarks 2002-01-11 ...
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... Extended output port A 59 EXTB O Extended output port B 60 EXTC O Extended output port C Function Schmitt input Schmitt input With pull-up resistor Schmitt input Schmitt input 2 C mode) Schmitt input Schmitt input Schmitt input Schmitt input With pull-up resistor Schmitt input 4 TC9444F Remarks 2002-01-11 ...
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... Note 1: See Table 2.2. Note 2: XI input divider clock XI Input MCKO Output DAC Oversampling Rate 192 fs 384 fs 384 fs 256 fs 512 fs 512 fs SYNC Mode SYNM1 BCKI 0 Master (Note 1) 1 Slave Slave Slave TC9444F 192 fs 256 fs BCKO 64 fs (Note 2) BCKI BCKI BCKI 2002-01-11 ...
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... MSB first, Right-Justified mode, 1 18-bit data MSB first, Right-Justified mode, 0 20-bit data MSB first, Right-Justified mode, 1 24-bit data 0 IIS-compatible, 24 bits 6 TC9444F BCKI 128 128 128 128 ...
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... MSB 0 19 LSB MSB 0 23 LSB MSB 0 23 Table 2.3 Channel Clock Polarity RLS Operation L-channel data input/output when LRCKI and LRCKO = 0 “H” L-channel data input/output when LRCKI and LRCKO = 1 “L” 7 TC9444F LSB 0 LSB 0 LSB 0 LSB 0 LSB MSB 0 23 2002-01-11 ...
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... Zero Data Detection Function Common to L/R The TC9444F incorporates a function to output a zero detection flag from the DZ pin when input data contain a string of digital zeros. This is used to forcibly mute the analog output. Table 2.4 shows the time that elapses until data are detected as zero data. If digital zeros continue to be output during this period, a zero detection flag is set. Moreover, setting the DZINH bit in the microcontroller interface mode command to “ ...
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... LSB MSB 0 15 LSB MSB 0 19 LSB MSB 0 23 LSB MSB 0 23 LSB MSB 0 15 LSB MSB 0 15 Figure 2.2 Data Output Formats 9 TC9444F LSB 0 LSB 0 LSB 0 LSB MSB 0 23 LSB 0 LSB 0 LSB MSB 0 23 LSB MSB 0 23 LSB MSB 0 15 LSB ...
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... Level detection release time ¾ Compressor function 2-byte Digital attenuator level A 2-byte Digital attenuator level B 2-byte Controls an independent key or sets vibrato. 2-byte Extended output port data 3-byte Writes coefficient RAM. 1-byte Sets IC operating mode. 10 TC9444F 2 C bus mode can 2002-01-11 ...
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... The soft mute automatically comes on to avoid switching noise at this time. After the command is issued, the following steps are performed automatically. Mute ® Internal settings switched ® Mute released This series of processing operations takes around execute RAMCLR MUTE 11 TC9444F 2002-01-11 ...
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... DC offset. (the CROM data determines the filter’s function.) Setting Content Key shift 0 (key control off) +1200 cent +600 cent +500 cent +400 cent +300 cent +200 cent +100 cent Key shift 0 -100 cent -200 cent -300 cent -400 cent -500 cent -600 cent -1200 cent 12 TC9444F 2002-01-11 ...
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... Output DAC block ¾ kHz Output DAC block Setting Content 1/1 decimation 1/2 decimation 1/3 decimation 1/4 decimation Attack Time [ms] CB2 CB2 CB2 TC9444F 0 Filter Characteristics CB2 2002-01-11 ...
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... Release Time CB2 CB2 1.1 0.5 H 1.6 1.0 L 2.6 2.0 H 4.6 4.1 L 8.7 8.2 H 16.9 16.3 L 33.3 32 CBS CB2 Compression CB2 CB1 Ratio 0 0 24dB 0 1 18dB 1 0 12dB 36dB 0 1 27dB 1 0 18dB TC9444F CB2 CB2 0.3 0.1 0.7 0.3 1.3 0.6 2.6 1.1 5.2 2.2 10.4 4.5 20.8 9.0 0 CB1 6dB 9dB 2002-01-11 ...
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... Time Constant kHz fs = 44.1 kHz 128 256 ms 186 ms 512 ms 372 ms 15 TC9444F D0 ALA08 ALA07 ~ ALA00 kHz 171 ms 341 ms 2002-01-11 ...
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... K2R [11:00]: When KEYCON2 is used for independent key control, these bits set the key control rate. When KEYCON2 is used to select the vibrato function, these bits set the step value that determines the vibrato cycle. D1 ALB12 ALB11 ALB10 ALB09 ALB08 D1 VIB K2R11 K2R10 K2R09 K2R08 16 TC9444F D0 ALB07 ~ ALB00 D0 K2R07 ~ K2R00 2002-01-11 ...
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... Table 3.17 Vibrato Cycle Set by KEYCON2 (ENA = = = = “H”, VIB = = = = “H”) Cycle [Hz] K2R [11:00 05D 4 0BA 8 175 K2R [11:00] = N/22500 [Hz] *100000H TC9444F 2002-01-11 ...
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... Note 13: A reset or a boot command sets the offset RAM value to its initial value. D1 EXTC EXTB EXTA EXT9 D2 AD5 AD4 AD3 AD2 AD1 D2 D1 DT15 ~ D2 AD5 AD4 AD3 AD2 AD1 D1 DECI2 DECI1 DECI0 DTI1 ~ 18 TC9444F D0 EXT8 EXT7 ~ EXT0 D1 AD0 AD17 AD16 D0 DT08 DT07 ~ DT00 D1 AD0 MAL2 MAL1 D0 DT08 DT07 ~ DT00 2002-01-11 ...
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... B 400H E 1024 word A 000H MAL0 Block Address Range ¾ G DECI1 DECI0 Decimation Ratio 1/4 19 TC9444F G 3FFh to 000h 7FFh to 400h BFFh to 800h FFFh to C00h 7FFh to 000h FFFh to C00h FFFh to 000h 2002-01-11 ...
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... As some circuitry is halted at this time, the power dissipation drops slightly Converter The TC9444F incorporates a successive approximation 6-bit AD converter with a two times oversampling rate. The AD converter performs three-channel interleave processing for the line input L/R-channels and the microphone input. ...
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... C bus mode does not permit continuous writing, insert an END condition after each command, then a START condition to start writing data again. < BOOT Boot operation completed. Do not write to the coefficient or offset RAM until boot is complete. 80% 40% > RST 2 C bus mode bus mode. 21 TC9444F 2002-01-11 ...
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... BCKI BCO LRCKI LRCKO Data Input LRCKI BCKI SDI Figure 7.3 Digital Data Input/Output Timing 90% 90% LRCKO BCKO 10% 10% SDO Synchronization width t dls LRh LRs t Dls t Dlh 23 TC9444F 2002-01-11 ...
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... Digital input pins 4 When V OH1 ¾ 0 When V OL1 When V OH2 ¾ 0 When V OL2 OH ¾ R RESET , TEST pin up 24 TC9444F = = = = 5 Min Typ. Max Unit 4.5 5.0 5.5 V ¾ ¾ ¾ ´ 0.8 V ¾ ´ 0.2 0 ¾ ¾ 1.0 mA -1.0 ¾ ...
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... T 5 ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ t RST ¾ ¾ ¾ Time required for boot BOOT 25 TC9444F Min Typ. Max Unit ¾ 1.15 1.20 V rms ¾ ¾ -65 -57 dB ¾ -68 -60 dB Min Typ. Max Unit ¾ ...
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GND RST CS SCL SDA DD2 V RESET IFSEL CS SCL SDA EMP TEST GNDD2 EXT7 EXT8 EXT9 EXTA EXTB EXTC TC4HC4050AP mF 0 0.1 0 220 220 pF 1200 pF 1200 EXT1 EXT0 ...
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... Package Dimensions Weight: 1.08 g (typ.) 27 TC9444F 2002-01-11 ...
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... TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. · The information contained herein is subject to change without notice. 28 TC9444F 000707EBA 2002-01-11 ...
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