tc9446f TOSHIBA Semiconductor CORPORATION, tc9446f Datasheet

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tc9446f

Manufacturer Part Number
tc9446f
Description
Audio Digital Processor For Decode Of Dolby Digital Ac-3 , Mpeg2 Audio -
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio
contains the decode processing program which embraced
encoding signals, such as Dolby Digital (AC-3)/Pro Logic (Note 1),
MPEG2 audio and DTS (Note 2).
single chip. Moreover, an external memory can be connected to
the TC9446F to decode DTS.
Features
TC9446F is the various digital signal processor for decoding. It
Decoding of Dolby Digital or MPEG2 audio is made with a
Dolby digital (AC-3) or MPEG2 audio decode
Acceptable bit rate upto 640 kbps
Audio interface
4 output port, 2 input port (2 port of LRCK and BCK)
DIR (digital audio interface receiver) built-in
DIT (digital audio interface transmitter) built-in
DIR and DIT are available upto 96 kHz sampling of 2 channel
Operating clock: DLL oscillator upto 6th times for DSP clock
Instruction cycle: 20 ns/1 instruction at 50 MIPS operation
DSP
Processor: 24 bit × 24 bit + 51 bit multiplier and adder, 51 bit ALU
Data bus: 24 bit × 3
Data RAM: 12 k word
Coeficient ROM: 4 k word
Program ROM: 12 k word
Program RAM: 128 word
MCU interface: Serial interface or I
Others
It is possible to connect external RAM, 256 k or 1 M SRAM
External interruption input terminal
Flag input terminal: 4 inputs
General-purpose output port: 8 outputs (The ports can be used as interrupt outputs to MCU and logic control
outputs.)
incorrect operation detect
Operating Voltage: 3.0 ± 0.3 V
In CMOS structure and high-speed processing
100 pin flat package design
Note 1: “Dolby”, “Pro Logic”, and the double-D symbol are trademarks of Dolby Laboratories.
Note 2: “DTS” and “DTS Digital Surround” are registered trademarks of Digital Theater Systems, Inc.
Note 3: Since this product has a weak terminal in serge voltage, please advise handling it enough.
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
2
C bus interface
TC9446F
1
Weight: 1.57 g (typ.)
2002-04-18
TC9446F

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tc9446f Summary of contents

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... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic Audio Digital Processor for Decode of Dolby Digital (AC-3), MPEG2 Audio TC9446F is the various digital signal processor for decoding. It contains the decode processing program which embraced encoding signals, such as Dolby Digital (AC-3)/Pro Logic (Note 1), MPEG2 audio and DTS (Note 2). ...

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... V 95 SSDL SCKI SSX 100 DDX TC9446F TC9446F LOCK 47 CKO 46 V SSA 45 CKI 44 AMPO 43 AMPI 42 PLON 41 V DDA 40 PDO 39 TSTSUB2 ...

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... MAC A1 A0 Round/Limiter 3 Timing Address Operater ×2 DLL X pointer Y pointer C pointer register register register Bus switch External SRAM interface AX AY General output port ALU Flag A2 A3 DIT Round/Limiter TC9446F SCKO SCKI DLON LPFO ADn 8 IOn 8 POn 4 FIn TXO 2002-04-18 ...

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... Test input-3 (L: test, H: normal operation SPDIF input  Digital ground SS Description of Pin Functions 2 C bus) 4 TC9446F Remarks Pull-up resistor, Schmitt input Pull-down resistor, Schmitt input Schmitt input Schmitt input Schmitt input/ Open-drain output Schmitt input Pull-up resistor, Schmitt input Pull-up resistor, ...

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... Address output-11 for external SRAM 76 AD12 O Address output-12 for external SRAM 77 AD13 O Address output-13 for external SRAM Description of Pin Functions 5 TC9446F Remarks Pull-up resistor, Schmitt input Tri-state output Pull-up resistor, Schmitt input Pull-up resistor, Schmitt input Tri-state output Pull-up resistor, Schmitt input ...

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... XI clock rd “L” 3 times of XI clock th “H” 6 times of XI clock 6 TC9446F Remarks Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor Pull-up resistor ...

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... Description of Operation 1. Micro Controller Interface The TC9446F can perform transmission and reception of serial data with a micro controller in the serial 2 mode or the I C mode. MIMD terminal performs a change in the serial mode and the I are performed at MSB first. The use terminal and the function in the serial mode and the I The bit composition bit command is shown in Table 2 ...

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... As for TC9446F, RAM is assigned 128 words of program address 0000h-007Fh, and the interruption vector address is become 0000h-0009h. Therefore, in order to operate TC9446F, it needs to interrupt and a program needs to be booted to a vector address. In addition, a program load needs to be continuously performed to an interruption vector address to store a program in 000Ah-007Fh. ...

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... Program starting Figure 2 Procedure of Program Boot and Program Start Setting “H” for bit of program boot and soft reset bit. Program data is 20 bit lower assign possible to do the program boot for address of 007Fh maximum. It finished the program boot. 9 TC9446F 2002-04-18 ...

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... Write of 24 bit data The number of words of data written in while data required for the 16 bit address bit command is set up and R/W bit is set to “L”, when writing in data from a MCU to TC9446F during program operation is set up. And, 24 bit data of the number required after transmitting a 24 bit command of words is written in. ...

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... Read-out of 24 bit data The number of words of data read while data required for the 16 bit address bit command is set up and R/W bit is set to “H”, when reading data of TC9446F from a MCU during program operation is set up. And, after transmitting a 24 bit command, MIACK = “L” is checked and 24 bit data of the required number of words is read. MIACK = “ ...

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... Transmission of 24 bit command (soft reset ON/OFF = 0000x0h) MICS = “H” Soft reset ON/OFF Figure 5 Procedure of ON/OFF of Soft Reset It is possible to transmit the command data of soft reset ON at MIACK = “H”. Soft reset ON: Bit = “1”. Soft reset OFF: Bit = “0”. 12 TC9446F 2002-04-18 ...

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... MICS terminal = “H”. Moreover, although it checks that MIACK terminal is “L” after setting MICS terminal to “L” in case a MCU starts access to TC9446F, MCU can judge that an internal program is a incorrect operation state, when the state of MIACK = “H” continues. ...

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... However, at the time of “H”, ACK bit performs Start Condition again, without performing STOP Condition, and transmits I bit command after Address transmission. And, at the time of data Write of TC9446F, Write of 24 bit data of the number (1-16 word) of words set bit command is performed from a MCU, and, finally, END Condition is transmitted. ...

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... The interval more is required until next START. (3Bh) 24 bit Read DATA (1 word to 16 word Add ( (M) A RD(L) These of ACK are retarned to TC9446F from MCU This ACK is MCU A COMMAND (L) A STOP TC9446F A STOP A STOP set up at “H”. ...

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... As for TC9446F, RAM is assigned 128 words of program address 0000h-007Fh, and the interruption vector address is become 0000h-0009h. Therefore, in order to operate TC9446F, it needs to interrupt at least and a program needs to be booted to a vector address. In addition, a program load needs to be continuously performed to an interruption vector address to store a program in 000Ah-007Fh ...

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... At the time of ACK = “H”, it resumes from START Condition. The bit of program boot and soft reset is set to “H”. Program data is 20 bits of low-rank stuffing. Boot is possible to the address of a maximum of 007Fh. The completion of program boot. At the time of ACK = “H”, it resumes from START Condition. 17 TC9446F 2002-04-18 ...

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... Write of 24 bit data The number of words of data written in while data required for the 16 bit address bit command is set up and R/W bit is set to “L”, when writing in data from a MCU to TC9446F during program operation is set up. And, 24 bit data of the number required after transmitting a 24 bit command of words is written in. ...

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... Although ACK bit of a data Read term needs to give “L” from a MCU, it needs to set only ACK bit added to last 8 bit data to “H”. This is because the Basra in of SDA where TC9446F are the master is opened wide and a MCU can transmit STOP Condition. ...

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... ACK bit is “H” continued. A MCU can perform incorrect operation detection by seeing this ACK bit. That is, since TC9446F are in a incorrect operation state when it is “H” fixation, even if ACK bit passes about more, ACK bit is disregarded, soft reset is turned ON, and each setup of TC9446F is performed again. At the time of ACK = “ ...

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... Setting Procedure Until it Starts Decode Program Operation Setting procedure until it starts operation of the decode program built in TC9446F is shown below. First, 10 words program data is transmitted in the program boot mode after release of the power-on reset at the time of a power-supply injection. However, when there is a program required for others, program data of a maximum of 128 words can be transmitted ...

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Write and a read of command change with decode programs built in. For details, please refer to program explanation data setup of DIR/DIT The digital reception recovery (DIR) for the audio interfaces and the abnormal-conditions transmission (DIT) based ...

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DIR input part When you input a signal into DIR, please be sure to input, as shown in Figure 17 through a signal amplification circuit V-3 V conversion circuit, etc. 4) Lock detection When VCO circuit locks ...

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Non-inputted detection When existence of the edge of the input signal from RX terminal is detected and there is no fixed time edge, VCO oscillation operates by free run. Since VCO oscillation frequency and CKO terminal output are set ...

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DLL oscillation clock can be chosen with DLCKS terminal and DLON terminal, as shown in Table 5. When DLCKS terminal and DLON terminal are “L”, the external clock input from SCKI terminal is chosen. An internal clock of operation is ...

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It can be used by the ability of able to connect external SRAM to processing of data tables, such as coefficient data, or data delay. The function of the terminal for external SRAM control is shown in Table 7. Moreover, ...

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Since two terminals (SDI0 and SDI1 terminal) are prepared for an audio serial data input and four terminals (SDO0-SDO3 terminal) are prepared for an output, the connection with external AD/DA converter LSI is easy. Although an input terminal (SDI0, SDI1, ...

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× ...

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µ µ * µ µ µ Ω Ω ...

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= = = = − + − + − + − + − −  < −  >    ...

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    =   =  =   =   =   =  =     =    =  =  =   ...

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     =                  −     ...

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                               =  =  =  =  = ...

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Memory read input/output (2) Memory write output  =   =   =   =  =   =   =   =   =   =  ...

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Clock terminal (XI, CKI, SCKI) Duty cycle ( /( DTY (2) Reset (3) Audio serial interface (LRCKx, BCKx, SDIx, LRCKOx, BCKOx, SDOx, CKO) ) × 100 (%) ...

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Micro controller interface (4-1) Serial transmission interface mode ( MICS , MICK , MIDIO, MILP , MIACK ) ÿùC ÿùC ...

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I C mode ( MICK , MIDIO) 2 Purchase of TOSHIBA I C components conveys a license under the Philips use these components Standard Specification as defined by Philips. C system, provided ...

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External RAM memory interface (5-1) READ cycle timing (5-2) WRITE cycle timing ...

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