a8291 Allegro MicroSystems, Inc., a8291 Datasheet
a8291
Related parts for a8291
a8291 Summary of contents
Page 1
... C™ data across the tracking regulator has been minimized. The A8291 has integrated tone detection capability, to support full two-way DiSEqC™ communications. Several schemes are available for generating tone signals, all the way down to no-load, and using either the internal clock or an external Continued on the next page… ...
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... The device uses a 2-wire bidirectional serial interface, compatible with the I 2 C™ standard, that operates up to 400 kHz. The A8291 is supplied in a lead (Pb) free 28-lead MLP/QFN. Selection Guide Part Number 7 in. reel, 1500 pieces/reel A8291SETTR-T b ...
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... A8291 Single LNB Supply and Control Voltage Regulator Terminal List Table Name ADD BFC BFI BFO BOOST EXTM GND GNDLX IRQ LNB LX 4, 13, 15-18, NC 20, 21, 23 PAD SCL SDA TCAP TDI TDO VCP VIN VREG Device Pin-out Diagram BOOST 1 VCP 2 TCAP 3 PAD ...
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... A8291 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS Characteristics General Set-Point Accuracy, Load and Line Regulation Supply Current Boost Switch On Resistance Switching Frequency Switch Current Limit Linear Regulator Voltage Drop TCAP Pin Current Output Voltage Rise Time 2 Output Voltage Pull-Down Time ...
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... A8291 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics Cable Disconnect Current Source Bypass FET Bypass FET Control (BFC) Logic Input Input Leakage Bypass FET On Resistance Turn On/Off Delay 2 Tone Tone Frequency Tone Amplitude, Peak-to-Peak Tone Duty Cycle ...
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... A8291 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics SCL Low Time SCL High Time Data Setup Time Data Hold Time Setup Time for Stop Condition 2 I C™ Address Setting ADD Voltage for Address 0001,000 ADD Voltage for Address 0001,001 ...
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... Short Circuit Handling If the LNB output is shorted to ground, the LNB output current will be clamped to 600 mA, typical. If the short circuit condition lasts for more than 48 ms, the A8291 will be disabled and the OCP bit will be set. Auto-Restart After a short circuit condition occurs, the host controller should ...
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... Tone Detection A 22 kHz tone detector is provided in the A8291 solution. The detector extracts the tone signal and provides open-drain signal on the TDO pin. The maximum tone out error is ±1 tone cycle, and the maximum tone out delay with respect to the input is 1 tone cycle ...
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... This is a serial interface that uses two bus lines, SCL and SDA, to access the internal Control and Status registers of the A8291. Data is exchanged between a microcontroller (master) and the A8291 (slave). The clock input to SCL is generated by the master, while SDA functions as either an input or an open drain output, depending on the direction of the data. ...
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... SDA line and send the data from register 1 to the master. On completion of the eight data bits, the A8291 releases the SDA line before the ninth clock cycle, in order to allow the master to acknowledge the data ...
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... Single LNB Supply and Control Voltage Regulator Control Registers (I 2 C™-Compatible Write Register) All main functions of the A8291 are controlled through the I compatible interface via the 8-bit Control registers. As the A8291 contains numerous control options necessary to have two Table 2. Control Register Address (I1, I0 Bit ...
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... A8291 Single LNB Supply and Control Voltage Regulator Table 3. Control Register Address (I1, I0 and 11 Bit Bit 0 TMODE Tone Mode. Selects between the use of an external 22 kHz logic signal or the use of the internal 22 kHz oscillator to control the tone generation on the LNB output selects the external tone and a 1 selects the internal tone ...
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... A8291 Single LNB Supply and Control Voltage Regulator Table 4. Output Voltage Amplitude Selection VSEL3 VSEL2 VSEL1 VSEL0 ...
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... Status registers. In all fault cases, once the bit is set, it remains latched until the A8291 is read by the I master, assuming the fault has been resolved. The current status of the LNB output is indicated by the dis- able bit, DIS ...
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... V occurred disabling the LNB outputs. The disable bit, DIS, will also be set and the A8291 will not reenable the output until so instructed by writing the relevant bit into the control registers. The status of the undervoltage condition is sampled on the rising edge of the 9 present, then the VUV bit will be reset allowing the master to reenable the LNB out- put if required ...
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... A8291 Single LNB Supply and Control Voltage Regulator Table 7. Status Register 2 Bit Bit 0 CAD Cable between LNB and the LNB head is disconnected. When cable disconnect test mode is applied, the LNB linear regulator is disabled and current source is applied between the BOOST and LNB output. If the LNB volts rise above 21 V, CAD will be set to 1 ...
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... A8291 Single LNB Supply and Control Voltage Regulator Table 8. Component Selection Table Component C3 220 nF C8 C12 b 220 nF X5R or X7R, 0805 C1, C4 100 nF X5R or X7R, 0603 C2, C5 100 μ nF C10, C13 10 nF X5R or X7R, 0402 or 0603 C11 0.68 μ ...
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... A8291 Single LNB Supply and Control Voltage Regulator 29X 0.08 C +0.05 0.25 –0.07 +0.20 0.55 –0. C™ trademark of Philips Semiconductors. DiSEqC™ trademark of Eutelsat S.A. Copyright ©2005, 2007, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. ...