lnbh23qtr STMicroelectronics, lnbh23qtr Datasheet

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lnbh23qtr

Manufacturer Part Number
lnbh23qtr
Description
Lnbs Supply And Control Ic With Step-up And I??c Interface
Manufacturer
STMicroelectronics
Datasheet

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Features
Table 1.
1. Available on request.
January 2008
Complete interface between LNB and I²C bus
Built-in DC/DC converter for single 12 V supply
operation and high efficiency (Typ. 93% @
0.75 A), with integrated NMOS
Selectable output current limit by external
resistor
Compliant with main satellite receiver systems
specifications
New accurate built-in 22 kHz tone generator
suits widely accepted standards (patent
pending) see
Fast oscillator start-up facilitates DiSEqC
encoding
Built-in 22 kHz tone detector supports bi-
directional DiSEqC
Very low-drop post regulator and high
efficiency step-up PWM with integrated power
N-MOS allow low power losses
Two output pins suitable to by-pass the output
R-L filter and avoid any tone distortion (R-L
filter as per DiSEqC
application circuits)
Overload and over-temperature internal
protections with I²C diagnostic bits
Output voltage and output current level
diagnostic feedback by I²C bits
LNB Short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
LNBH23QTR
LNBH23PPR
Order code
Device summary
LNBs supply and control IC with step-up and I²C interface
Figure 1
TM
(1)
TM
2.0
and
2.0 specs, see typ.
Figure 4
PowerSSO-24 (Exposed pad)
QFN32 (Exposed pad)
TM
Package
Rev 3
Description
Intended for analog and digital satellite
receivers/Sat-TV, sat-PC cards, the LNBH23 is a
monolithic voltage regulator and interface IC,
assembled in PowerSSO-24 ePAD and QFN32
(5x5 mm) ePAD, specifically designed to provide
the 13/18 V power supply and the 22 kHz tone
signalling to the LNB down-converter in the
antenna dish or to the multi-switch box. In this
application field, it offers a complete solution with
extremely low component count, low power
dissipation together with simple design and I²C
standard interfacing.
(Exposed pad)
PowerSSO-24
Tape and reel
Tape and reel
Packaging
QFN32 (5x5mm)
(Exposed pad)
LNBH23
www.st.com
1/32
32

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lnbh23qtr Summary of contents

Page 1

... LNB Short circuit dynamic protection ■ +/- 4 kV ESD tolerant on output power pins Table 1. Device summary Order code LNBH23PPR (1) LNBH23QTR 1. Available on request. January 2008 Figure 4 Description TM Intended for analog and digital satellite receivers/Sat-TV, sat-PC cards, the LNBH23 is a monolithic voltage regulator and interface IC, ...

Page 2

Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Transmitted data (I²C bus write mode 7.4 Diagnostic received data (I²C ...

Page 4

Block diagram Figure 1. Block diagram LX LX Rsense Rsense P-GND P-GND Vup Vup VoRX VoRX VoTX VoTX TTX TTX TTX EXTM EXTM DSQIN DSQIN VCTRL VCTRL 4/32 ISEL ISEL TTX TTX ADDR ADDR SDA SCL SDA SCL EN ...

Page 5

Application information This IC has a built-in DC/DC step-up converter with integrated NMOS that, from a single source from generates the voltages (V work at a minimum dissipated power of 0.375 W Typ. @ ...

Page 6

Data encoding by external tone generator (EXTM) In order to improve design flexibility an external tone input pin is available (EXTM). The EXTM is a logic input pin which activates the 22 kHz tone output, on the V the ...

Page 7

V =13.4 V) you will have V oRX This means that VCTRL=0 must be used only for short time to avoid the higher power dissipation. In stand-by condition (EN bit LOW) all the I²C bits and the TTX pin must ...

Page 8

Output current limit selection The linear regulator current limit threshold can be set by an external resistor connected to I pin. The resistor value defines the output current limit by the equation: SEL I [A] = 10000/R MAX where ...

Page 9

Pin configuration Figure 3. Pin connections (top view for PowerSSO-24, bottom view for QFN32) DETIN DETIN 1 1 VCTRL VCTRL P-GND ...

Page 10

Table 2. Pin description (continued) Pin n° for Pin n° for Symbol QFN32 PSSO- DSQOUT 13 13 EXTM 15 15 BYP 10 10 ADDR 28 23 ISEL 30 2 VCTRL 5 7 P-GND Epad Epad Epad 20 18 ...

Page 11

Maximum ratings Table 3. Absolute maximum ratings Symbol power supply input voltage pins CC input voltage UP I Output current output pin voltage oRX V Tone output pin voltage ...

Page 12

Application circuit Figure 4. Typical application circuit Ferrite Bead Filter Ferrite Bead Filter L2 L2 suggested part number: suggested part number: MURATA BL01RN1-A62 MURATA BL01RN1-A62 Panasonic EXCELS A35 Panasonic EXCELS A35 L2 C5 100µ 470nF ...

Page 13

Table 5. Bill of material (continued) Component 22 µH Inductor with I L1 FERRITE BEAD, Panasonic-EXCELS A35 or Murata-BL01RN1-A62 or Taiyo-Yuden- L2 BKP1608HS600 or equivalent with similar or higher impedance and current rating higher than 2A L3 220µH-270µH Inductor with ...

Page 14

I²C bus interface Data transmission from main MCU to the LNBH23 and vice versa takes place through the 2 wires I²C bus Interface, consisting of the 2 lines SDA and SCL (pull-up resistors to positive supply voltage must be ...

Page 15

Figure 5. Data validity on the I²C bus Figure 6. Timing diagram of I²C bus Figure 7. Acknowledge on the I²C bus 15/32 ...

Page 16

LNBH23 software description 7.1 Interface protocol The interface protocol comprises: ● A start condition (S) ● A chip address byte (the LSB bit determines read(=1)/write(=0) transmission) ● A sequence of data (1 byte + acknowledge) ● A stop condition ...

Page 17

Transmitted data (I²C bus write mode) When the R/W bit in the chip address is set to 0, the main MCU can write on the system register (SR) of the LNBH23 via I²C bus. All and 8 bits are ...

Page 18

Table 7. Register IMON VMON TMON LLC These bits are read exactly the same as they were left after last write operation (2) (3) 0/1 0/1 0/1 1. Values are typical unless otherwise specified 2. IMON information must be disregarded ...

Page 19

Electrical characteristics Table 8. Electrical characteristics (Refer to the typical application circuit, T VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= mA, unless otherwise stated. Typical values are referred to T voltage. See software description section for I²C access to the system register) Symbol ...

Page 20

Table 8. Electrical characteristics (continued) (Refer to the typical application circuit, T °C, EN=1, VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= mA, unless otherwise stated. Typical values are referred pin voltage. See software description section for ...

Page 21

Table 11. Output voltage diagnostic (VMON bit) characteristics (Refer to the typical application circuit, T from °C, EN=1, VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= DSQIN=LOW ° oRX ...

Page 22

Typical performance characteristics (Refer to the typical application circuit, T VSEL=LLC=TEN=PCL=ITEST=TTX=AUX= mA, unless otherwise stated. Typical values are referred voltage. See software description section for I²C access to the system register). Figure ...

Page 23

Figure 14. Supply current vs temperature =12V =12V =No Load =No Load EN=TEN=TTX=LLC=VSEL=1 EN=TEN=TTX=LLC=VSEL ...

Page 24

Figure 20. Tone frequency vs temperature =12V, I =12V, I =50mA =50mA EN=TEN=TTX=1 EN=TEN=TTX -10 -10 ...

Page 25

Figure 26. DC/DC Converter efficiency vs temperature 100 100 EN=VSEL=LLC=1 EN=VSEL=LLC -10 - [°C] T [°C] Figure ...

Page 26

Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner ...

Page 27

Table 14. QFN32 (5x5 mm) mechanical data Dim ddd Figure 30. QFN32 package dimensions (mm.) Min. Typ. 0.80 0.85 0.18 0.25 0.165 0.175 4.85 5.00 3.00 3.10 1.10 1.20 ...

Page 28

DIM. MIN. TYP. MAX. A 2.15 2.47 0.084 A2 2.15 2.40 0.084 a1 0 0.075 b 0.33 0.51 0.013 c 0.23 0.32 0.009 (1) 10.10 10.50 0.398 D (1) 7.4 7.6 0.291 E e 0.8 e3 8.8 G 0.10 ...

Page 29

Tape & reel PowerSSO-24 mechanical data mm. Dim. Min. Typ 12 10.8 Bo 10.7 Ko 2.65 Po 3 23.7 inch. Max. Min. Typ. 330 13.2 0.504 0.795 2.362 ...

Page 30

Tape & reel QFNxx/DFNxx (5x5 mm.) mechanical data Dim. Min 12 30/32 mm. Typ. Max. Min. 330 13.2 0.504 0.795 101 3.898 14.4 5.25 5.25 1 ...

Page 31

Revision history Table 15. Document revision history Date Revision 02-Apr-2007 1 15-Nov-2007 2 11-Jan-2008 3 Changes Initial release. Added Note 2 on Table 3. Added: new package QFN32 and Table 5. 31/32 ...

Page 32

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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