s1s65000 Epson Electronics America, Inc., s1s65000 Datasheet

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s1s65000

Manufacturer Part Number
s1s65000
Description
Network Camera Controller With Jpeg Encoder
Manufacturer
Epson Electronics America, Inc.
Datasheet

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S1S65000
! ! ! ! DESCRIPTIONS
! ! ! ! FEATURES
! ! ! ! BUILT-IN FUNCTIONS
S1S65000 is an optimum network camera controller IC for configuring Internet cameras. In addition to the
network/protocol processing function, it has camera interface and JPEG encoder function. Connecting a camera module,
PHY for the Ethernet and a Flash EEPROM stored with a firmware to the S1S65000 enables simple configuration of the
Internet camera.
Image captures and JPEG encoding can be set to work continuously or be triggered by software. While operating the
S1S65000 on the LAN as the HTTP server, image files can be sent to the client on request. Image can be captured in a
constant cycle by using the internal timer or in conjunction with an external sensor through its interrupt pin, and be sent
to a specified client. E-mail attached format is possible.
GPIO pins and I
network.
Network device drivers are attached for this product.
Network Camera Controller with JPEG Encoder
! Realize the function of the Internet camera without the PC
! Supports various camera modules up to VGA size
! Compress image into JPEG format with internal JPEG encoder
! Rewritable JPEG encoder table (quantization, AC/DC table)
! Peripheral devices control over the network using the GPIO pins and I
! Various control setting over the network
! Image transfer by e-mail
! Power saving by periodic suspension/restart with timers, etc.
! Access restriction with password setting
! Wireless LAN interface support through CompactFlash card interface
! CPU:
! RAM:
! Camera input/JPEG encoder:
! JPEG:
! Network:
" 32Bit RISC ARM720T (50MHz)
" 32Bit-long codes and efficient 16bit-long codes
" 31 general-purpose 32 bit registers
" A multiplier is included in the CPU.
" 48KB Embedded RAM for CPU/JPEG/Ethernet
" YUV4-2-2 (8bit input) (Progressive type)
" Resolution: VGA, QVGA, CIF, QCIF
" Supports ITU-R BT656 format
" Hardware JPEG encoder
" Max. 7.5 fps @VGA, 15 fps @CIF
" Maximum pixel clock frequency for camera data
" Ethernet Mac controller supporting 10/100 BASE
" Media Independent Interface (IEEE 802.3 Clause 22
" An enhanced DMA
" Hardware JPEG encoder
" Resize function
" Dedicated Line Buffer
" FIFO for JPEG encode output
" An enhanced DMA
(Thumb Code) can be selected for use
Work
input: less than 1/3 of CPU clock
Full duplex and Half duplex mode
compliant)
2
C bus is useful to configure the camera and control external devices such as the motor over the
SEIKO EPSON CORPORATION
! External Memory Controller:
! CF Card Interface:
! Standby function:
! Timer, Watchdog Timer:
! Serial Interface:
! Interrupt Controller:
" 16Bit Data Bus
" Supports 2 to 128MB SDRAM
" Supports static memory (Flash ROM/SRAM).
" 3 Chip Select pins (typically for SDRAM, Flash
" CF+ Specification Rev.1.4 compliant.
" Can be used as the interface of wireless LAN,
" Supports True IDE interface
" The HALT function to stop the CPU clock when
" Programmable I/O clock stop function for major
" 16-Bit timer
" Re-load/Cyclic or One Shot Operation Mode
" Supports toggle outputs from timer underflow.
" Interrupt output or re-settable watchdog timer.
" UART: 16550 Software compatible
" SPI: Clock synchronous type
" I
" Supports 32 IRQs and 2 FIQs.
(Maximum capacity: 4MB)
EEPROM and another chip).
Memory card, etc.
CPU operation is not required.
I/O block clocks.
multipurpose use)
2
C master interface (camera Interface and
2
C bus interface
3 channels
3 channels
1 channel

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s1s65000 Summary of contents

Page 1

... Image captures and JPEG encoding can be set to work continuously or be triggered by software. While operating the S1S65000 on the LAN as the HTTP server, image files can be sent to the client on request. Image can be captured in a constant cycle by using the internal timer or in conjunction with an external sensor through its interrupt pin, and be sent to a specified client ...

Page 2

... Directions programmable for all ports. " Some ports are shared with other I/O functions SUPPORTING PROTOCOLS ARP, ICMP, IP, TCP, UDP, HTTPd, SMTP, DHCP*, FTP*, DNS resolver*, telnet* Necessary protocols can be added or updated by rewriting Flash ROM. *: Sample code BLOCK DIAGRAM S1S65000 ARM720T RTC 2 UART I C ...

Page 3

... CMCLKOUT CLKI 103 CMDATA0 PLLVSS 104 CMDATA1 VCP 105 HVDD2 PLLVDD 106 CMDATA2 RESET# 107 CMDATA3 TESTEN 108 CMDATA4 EPSON S1S65000 72 37 Pin Name Pin No. Pin Name 109 CMDATA5 110 CMDATA6 111 CMDATA7 112 VSS 113 LVDD 114 GPIOD0 115 GPIOD1 ...

Page 4

... S1S65000 ! ! ! ! PIN DESCRIPTION #: # at the right end of a pin name indicates a low active signal. I: Input pin O: Output pin IO: Bi-directional pin P: Power Supply Cell Type Description Cell Type ICS LVCMOS Schmitt input ICD1 LVCMOS input with pull down resistor (50k @3.3V) ICU1 LVCMOS input with pull up resistor (50k @3.3V) ...

Page 5

... GPIOF0 input/output " SPI1_SS: Chip select signal for SPI1 (Select “Function 2”) 58 This pin has the following functions: " MII_RXDV: Receive data valid RXDV input from MII PHY (Default pin function, “Function 1”) " GPIOG2 input/output EPSON S1S65000 5 ...

Page 6

... S1S65000 Cell Pin Name Type Type MII_RXD [3:0] I/O BLNC4 MII_RXER I/O BLNC4 MII_MDC I/O BLNC4 MII_MDIO I/O BLNC4 CMDATA [7:0] I/O BLNS4D1 CMVREF I/O BLNS4D1 CMHREF I/O BLNS4D1 CMCLKOUT I/O BLNS4D1 CMCLKIN I/O BLNS4D1 CFCE2# I/O BLNC4U1 CFCE1# I/O BLNC4U1 CFIORD# I/O BLNC4U1 CFIOWR# I/O BLNC4U1 6 Pin No. 59-60, 62-63 These pins have the following functions: " MII_RXD [3:0]: Receive data RXD [3:0] input from MII PHY (Default pin function, “ ...

Page 7

... GPIOA6 input/output (Default pin function) " SCL: Serial clock input/output for I 86 This pin has the following functions: " GPIOA7 input/output (Default pin function) " SDA: Serial data input/output for I EPSON S1S65000 2 C (Select “Function 1” (Select “Function 1”) 7 ...

Page 8

... S1S65000 Cell Pin Name Type Type GPIOB0 I/O BLNS4 GPIOB1 I/O BLNS4 GPIOB2 I/O BLNS4 GPIOB3 I/O BLNS4 GPIOB4 I/O BLNS4 GPIOB5 I/O BLNS4 GPIOB6 I/O BLNS4 GPIOB7 I/O BLNS4 GPIOD0 I/O BLNS4 GPIOD1 I/O BLNS4 CLKI I ICS VCP O OLTR TRST# I ICSU1 TCK I ICS TMS I ICU1 TDI I ICU1 TDO O OTLN4 TESTEN ...

Page 9

... Max. 140mW (Typ.), 3mW (When the status is HALT and MII Interface stopped - TQFP 144 pin (TQFP24) 16 EPSON S1S65000 Description High Reserved (for test) * Reserved (for test) * Reserved (for test) * Features 0.4mm Pin pitch 9 ...

Page 10

... S1S65000 ! MULTIPLEX PIN FUNCTION OF GPIO PIN AND PIN FUNCTION AFTER RESETTING Pin S1S65000 Function GPIO INT Pin Name after Reset GPIOA0 GPIOA0 GPIOA0 GPIOA1 GPIOA1 GPIOA1 GPIOA2 GPIOA2 GPIOA2 GPIOA3 GPIOA3 GPIOA3 GPIOA4 GPIOA4 GPIOA4 GPIOA5 GPIOA5 GPIOA5 GPIOA6 GPIOA6 GPIOA6 ...

Page 11

... High-Z None Depend on the external circuit High-Z None High-Z None Remain in the Open state to use HIGH Pull Up Resistor 50k High-Z None HIGH Pull Up Resistor 50k HIGH Pull Up Resistor 50k High-Z None LOW Pull Down Resistor 50k HIGH None EPSON S1S65000 Description 11 ...

Page 12

... Epson Corporation 2005, All rights reserved. SEIKO EPSON CORPORATION SEMICONDUCTOR OPERATIONS DIVISION IC Sales Department IC International Sales Gloup 421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone: 042-587-5814 FAX: 042-587-5117 12 32.768kHz OSC S1S65000 Trigger GPI/O LAN PHY card OSC 10BASE-T/ 25MHz 100BASE-TX EPSON Flash Protocol stack ...

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