attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 107

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

Serial Downloading
2535G–AVR–01/07
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI
bus while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI
(input) and MISO (output). After RESET is set low, the Programming Enable instruction
needs to be executed first before program/erase operations can be executed. NOTE, in
Table 48 on page 107, the pin mapping for SPI programming is listed. Not all parts use
the SPI pins dedicated for the internal SPI interface.
Figure 54. Serial Programming and Verify
Notes:
Table 48. Pin Mapping Serial Programming
When programming the EEPROM, an auto-erase cycle is built into the self-timed pro-
gramming operation (in the Serial mode ONLY) and there is no need to first execute the
Chip Erase instruction. The Chip Erase operation turns the content of every memory
location in both the Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high
periods for the serial clock (SCK) input are defined as follows:
Low:> 2 CPU clock cycles for f
High:> 2 CPU clock cycles for f
Symbol
MOSI
MISO
SCK
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock
source to the CLKI pin.
RESET
Pins
PB0
PB1
PB2
ck
ck
PB5
GND
< 12 MHz, 3 CPU clock cycles for f
< 12 MHz, 3 CPU clock cycles for f
(1)
I/O
I
O
I
VCC
PB2
PB1
PB0
+1.8 - 5.5V
ck
ck
SCK
MISO
MOSI
>= 12 MHz
>= 12 MHz
Description
Serial Data in
Serial Data out
Serial Clock
107