attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 113

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

High-voltage Serial
Programming Algorithm
Enter High-voltage Serial
Programming Mode
Considerations for Efficient
Programming
2535G–AVR–01/07
To program and verify the ATtiny13 in the High-voltage Serial Programming mode, the
following sequence is recommended (See instruction formats in Table 55):
The following algorithm puts the device in High-voltage Serial Programming mode:
1. Apply 4.5 - 5.5V between V
2. Set RESET pin to “0” and toggle SCI at least six times.
3. Set the Prog_enable pins listed in Table 53 to “000” and wait at least 100 ns.
4. Apply V
5. Shortly after latching the Prog_enable signature, the device will actively output
6. Wait at least 50 µs before giving any serial instructions on SDI/SII.
Note:
1. Set Prog_enable pins listed in Table 53 to “000”.
2. Apply 4.5 - 5.5V between V
3. Wait 100 ns.
4. Re-program the fuses to ensure that External Clock is selected as clock source
5. Exit Programming mode by power the device down or by bringing RESET pin to
6. Enter Programming mode with the original algorithm, as described above.
Table 54. High-voltage Reset Characteristics
The loaded command and address are retained in the device during programming. For
efficient programming, the following should be considered.
•
•
•
Supply Voltage
V
4.5V
5.5V
CC
least t
signature has been latched.
data on the Prog_enable[2]/SDO pin, and the resulting drive contention may
increase the power consumption. To minimize this drive contention, release the
Prog_enable[2] pin after t
to RESET.
(CKSEL1:0 = 0b00) and RESET pin is activated (RSTDISBL unprogrammed). If
Lock bits are programmed, a Chip Erase command must be executed before
changing the fuses.
0b0.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless
the EESAVE Fuse is programmed) and Flash after a Chip Erase.
Address High byte needs only be loaded before programming or reading a new 256
word window in Flash or 256 byte EEPROM. This consideration also applies to
Signature bytes reading.
If the RESET pin is disabled by programming the RSTDISBL Fuse, it may not be possible
to follow the proposed algorithm above.The same may apply when External Crystal or
External RC configuration is selected because it is not possible to apply qualified CLKI
pulses. In such cases, the following algorithm should be followed:
HVRST
HVRST
after the High-voltage has been applied to ensure the Prog_enable
- 12.5V to RESET. Keep the Prog_enable pins unchanged for at
RESET Pin High-voltage Threshold
HVRST
CC
CC
V
HVRST
12V
and GND simultanously as 11.5 - 12.5V is applied
and GND.
12
has elapsed.
Minimum High-voltage Period
for Latching Prog_enable
100 ns
100 ns
t
HVRST
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