atmega164-20pu ATMEL Corporation, atmega164-20pu Datasheet - Page 6

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atmega164-20pu

Manufacturer Part Number
atmega164-20pu
Description
8-bit Microcontroller With 16/32/64k Bytes In-system Programmable Flash - Atmel Corporation
Manufacturer
ATMEL Corporation
Datasheet
Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
Port C (PC7..PC0)
Port D (PD7..PD0)
RESET
XTAL1
XTAL2
AVCC
6
ATmega164/324/644
Digital supply voltage.
Ground.
Port A serves as analog inputs to the Analog-to-digital Converter.
Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port A output buffers have symmetrical drive characteristics
with both high sink and source capability. As inputs, Port A pins that are externally
pulled low will source current if the pull-up resistors are activated. The Port A pins are
tri-stated when a reset condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega164/324/644
as listed on page 71.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega164/324/644
as listed on page 73.
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port C output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port C pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port C also serves the functions of the JTAG interface, along with special features of the
ATmega164/324/644 as listed on page 76.
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port D output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATmega164/324/644
as listed on page 78.
Reset input. A low level on this pin for longer than the minimum pulse length will gener-
ate a reset, even if the clock is not running. The minimum pulse length is given in Table
20 on page 44. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the Analog-to-digital Converter. It should
be externally connected to V
be connected to V
CC
through a low-pass filter.
CC
, even if the ADC is not used. If the ADC is used, it should
2593AS–AVR–06/05

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