atmega103 ATMEL Corporation, atmega103 Datasheet - Page 122

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atmega103

Manufacturer Part Number
atmega103
Description
Atmega103 8-bit With 128k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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External Clock Drive
Waveforms
122
ATmega103(L)
Figure 79. External RAM Timing
Figure 80. External Clock Drive Waveforms
Table 49. External Clock Drive
Note:
Data / Address [7..0]
Data / Address [7..0]
Note: Clock cycle T3 is only present when external SRAM Wait State is enabled.
Symbol
1/t
t
t
t
t
t
CLCL
CHCX
CLCX
CLCH
CHCL
CLCL
System Clock Ø
Address [15..8]
See “External Data Memory Timing” on page 120. for a description of how the duty cycle
influences the timing for the external Data memory.
VIL1
Parameter
Oscillator Frequency
Clock Period
High Time
Low Time
Rise Time
Fall Time
ALE
VIH1
WR
RD
Prev. Address
Prev. Address
Prev. Address
T1
0
4
3a
Address
1
2
V
Address
CC
250.0
100.0
100.0
0.0
8
3b
= 2.7V to 3.6V
5
T2
13
10
4.0
1.6
1.6
7
6
Address
Data
V
9
CC
167.0
T3
67.0
67.0
Data
0.0
16
= 4.0V to 5.5V
11
6.0
0.5
0.5
0945I–AVR–02/07
15
12
T4
14
Addr.
Addr.
Units
MHz
ns
ns
ns
µs
µs

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