atmega103 ATMEL Corporation, atmega103 Datasheet - Page 24
atmega103
Manufacturer Part Number
atmega103
Description
Atmega103 8-bit With 128k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA103.pdf
(141 pages)
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ATmega103(L)
higher the priority level. RESET has the highest priority and next is INT0 (the External
Interrupt Request 0), etc.
Table 4. Reset and Interrupt Vectors
The most typical program setup for the Reset and Interrupt vector addresses are:
Vector No.
Address Labels Code
$0000
$0002
$0004
$0006
$0008
$000A
$000C
$000E
$0010
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Program
Address
$000A
$000C
$000E
$001A
$001C
$001E
$002A
$002C
$002E
$0000
$0002
$0004
$0006
$0008
$0010
$0012
$0014
$0016
$0018
$0020
$0022
$0024
$0026
$0028
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
Source
RESET
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
TIMER2 COMP
TIMER2 OVF
TIMER1 CAPT
TIMER1 COMPA
TIMER1 COMPB
TIMER1 OVF
TIMER0 COMP
TIMER0 OVF
SPI, STC
UART, RX
UART, UDRE
UART, TX
ADC
EE READY
ANALOG COMP
RESET
EXT_INT0
EXT_INT1
EXT_INT2
EXT_INT3
EXT_INT4
EXT_INT5
EXT_INT6
EXT_INT7
Interrupt Definition
Hardware Pin, Power-on Reset and Watchdog
Reset
External Interrupt Request 0
External Interrupt Request 1
External Interrupt Request 2
External Interrupt Request 3
External Interrupt Request 4
External Interrupt Request 5
External Interrupt Request 6
External Interrupt Request 7
Timer/Counter2 Compare Match
Timer/Counter2 Overflow
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
SPI Serial Transfer Complete
UART, Rx Complete
UART Data Register Empty
UART, Tx Complete
ADC Conversion Complete
EEPROM Ready
Analog Comparator
; Reset Handler
; IRQ0 Handler
; IRQ1 Handler
; IRQ2 Handler
; IRQ3 Handler
; IRQ4 Handler
; IRQ5 Handler
; IRQ6 Handler
; IRQ7 Handler
Comments
0945I–AVR–02/07
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