at90s2323 ATMEL Corporation, at90s2323 Datasheet - Page 30

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at90s2323

Manufacturer Part Number
at90s2323
Description
8-bit Microcontroller With 2k Bytes Of In-system Programmable Flash At90s2323 At90ls2323 At90s2343 At90ls2343
Manufacturer
ATMEL Corporation
Datasheet

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Timer/Counter0 – TCNT0
Watchdog Timer
30
AT90S/LS2323/2343
The Stop condition provides a Timer Enable/Disable function. The CK down divided
modes are scaled directly from the CK oscillator clock. If the external pin modes are
used for Timer/Counter0, transitions on PB2/(T0) will clock the counter even if the pin is
configured as an output. This feature can give the user software control of the counting.
The Timer/Counter0 is realized as an up-counter with read and write access. If the
Timer/Counter0 is written and a clock source is present, the Timer/Counter0 continues
counting in the timer clock cycle following the write operation.
The Watchdog Timer is clocked from a separate On-chip oscillator. By controlling the
Watchdog Timer prescaler, the Watchdog reset interval can be adjusted as shown in
Table 11. See characterization data for typical values at other V
(Watchdog Reset) instruction resets the Watchdog Timer. Eight different clock cycle
periods can be selected to determine the reset period. If the reset period expires without
another Watchdog reset, the AT90S2323/2343 resets and executes from the reset vec-
tor. For timing details on the Watchdog reset, refer to page 23.
To prevent unintentional disabling of the Watchdog, a special turn-off sequence must be
followed when the Watchdog is disabled. Refer to the description of the Watchdog Timer
Control Register for details.
Figure 31. Watchdog Timer
Bit
$32 ($52)
Read/Write
Initial Value
MSB
R/W
7
0
Oscillator
350 kHz at V
1 MHz at V
R/W
6
0
CC
CC
= 5V
= 3V
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
CC
levels. The WDR
LSB
R/W
0
0
1004D–09/01
TCNT0

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