at91sam7l128 ATMEL Corporation, at91sam7l128 Datasheet - Page 22

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at91sam7l128

Manufacturer Part Number
at91sam7l128
Description
At91 Arm Thumb-based Microcontroller
Manufacturer
ATMEL Corporation
Datasheet

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7.4
22
Peripheral DMA Controller
AT91SAM7L128/64 Preliminary
• Handles data transfer between peripherals and memories
• Eleven channels
• Low bus arbitration overhead
• Next Pointer management for reducing interrupt latency requirements
– Embedded Flash interface, up to three programmable wait states
– Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the required
– Key-protected program, erase and lock/unlock sequencer
– Single command for erasing, programming and locking operations
– Interrupt generation in case of forbidden operation
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Peripheral Interface
– Two for the Two Wire Interface
– One for the Analog-to-digital Converter
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
wait states
6257AS–ATARM–28-Feb-08

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