at91sam7l128 ATMEL Corporation, at91sam7l128 Datasheet - Page 27

• Manufacturer Part Number: at91sam7l128
• Description: At91 Arm Thumb-based Microcontroller
• Manufacturer: ATMEL Corporation

8.1.2.3
8.1.2.4
8.1.2.5
8.1.2.6
6257AS–ATARM–28-Feb-08
Enhanced Embedded Flash Controller
Lock Regions
Security Bit Feature
Calibration Bits
The Enhanced Embedded Flash Controller (EEFC) manages accesses performed by the mas-
ters of the system. It enables reading the Flash and writing the write buffer. It also contains a
User Interface, mapped within the Memory Controller on the APB.
The Enhanced Embedded Flash Controller ensures the interface of the Flash block with the 32-
bit internal bus. Its 128-bit wide memory interface increases performance. It also manages the
programming, erasing, locking and unlocking sequences of the Flash using a full set of com-
mands. One of the commands returns the embedded Flash descriptor definition that informs the
system about the Flash organization, thus making the software generic.
The AT91SAM7L128 Embedded Flash Controller manages 16 lock bits to protect 16 regions of
the flash against inadvertent flash erasing or programming commands. The AT91SAM7L128
contains 16 lock regions and each lock region contains 32 pages of 256 bytes. Each lock region
has a size of 8 Kbytes.
The AT91SAM7L64 Embedded Flash Controller manages 8 lock bits to protect 8 regions of the
flash against inadvertent flash erasing or programming commands. The AT91SAM7L64 con-
tains 8 lock regions and each lock region contains 32 pages of 256 bytes. Each lock region has
a size of 8 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EEFC
triggers an interrupt.
The 16 NVM bits are software programmable through the EEFC User Interface. The command
“Set Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The AT91SAM7L128/64 features a security bit, based on a specific General Purpose NVM bit
(GPNVM bit 0). When the security is enabled, any access to the Flash, either through the ICE
interface or through the Fast Flash Programming Interface, is forbidden. This ensures the confi-
dentiality of the code programmed in the Flash.
This security bit can only be enabled, through the command “Set General Purpose NVM Bit 0” of
the EEFC User Interface. Disabling the security bit can only be achieved by asserting the
ERASE pin at 1, and after a full Flash erase is performed. When the security bit is deactivated,
all accesses to the Flash are permitted.
It is important to note that the assertion of the ERASE pin should always be longer than 200 ms.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal
operation. However, it is safer to connect it directly to GND for the final application.
NVM bits are used to calibrate the brownout detector and the voltage regulator. These bits are
factory configured and cannot be changed by the user. The ERASE pin has no effect on the cal-
ibration bits.
AT91SAM7L128/64 Preliminary
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