at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 35

• Manufacturer Part Number: at91rm3400
• Description: Atmel Advanced At91 Arm Microcontroller
• Manufacturer: ATMEL Corporation

Debug Unit
IEEE 1149.1 JTAG
Boundary Scan
JTAG Boundary-scan Register The Boundary-scan Register (BSR) contains 189 bits which correspond to active pins
1790A–ATARM–11/03
The Debug Unit provides a two-pin (DXRD and TXRD) USART that can be used for sev-
eral debug and trace purposes and offers an ideal means for in-situ programming
solutions and debug monitor communication. Moreover, the association with two periph-
eral data controller channels permits packet handling of these tasks with processor time
reduced to a minimum.
The Debug Unit also manages the interrupt handling of the COMMTX and COMMRX
signals that come from the ICE and that trace the activity of the Debug Communication
Channel.The Debug Unit allows blockage of access to the system through the ICE
interface.
The Debug Unit can be used to upload an application into the internal SRAM. It is acti-
vated by the boot program when no valid application is detected. The protocol used to
load the application is XMODEM.
A specific register, the Debug Unit Chip ID Register, informs about the product version
and its internal configuration.
AT91RM3400 Debug Unit Chip ID value is: 0x034E0941, on 32-bit width.
For further details on the Debug Unit, see the Debug Unit section.
For further details on the Debug Unit and Boot program, see Boot Program
Specifications.
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device
packaging technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE,
EXTEST and BYPASS functions are implemented. In ICE debug mode, the ARM pro-
cessor responds with a non-JTAG chip ID that identifies the processor to the ICE
system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must
be performed (NRST) after JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
and associated control signals.
Each AT91RM3400 input/output pin corresponds to a 3-bit register in the BSR. The
OUTPUT bit contains data that can be forced on the pad. The INPUT bit facilitates the
observability of data applied to the pad. The CONTROL bit selects the direction of the
pad.
Table 11. JTAG Boundary Scan Register
Number
189
188
187
186
185
184
Bit
PB19/CTS3/MCCDB0
PB18/RTS3/MCCDB
Pin Name
Pin Type
IN/OUT
IN/OUT
AT91RM3400
Associated BSR
CONTROL
CONTROL
OUTPUT
OUTPUT
INPUT
INPUT
Cells
35