lpc1778 NXP Semiconductors, lpc1778 Datasheet

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lpc1778

Manufacturer Part Number
lpc1778
Description
32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 96 Kb Sram; Usb Device/host/otg; Ethernet; Lcd; Emc
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features and benefits
The LPC178x/7x is an ARM Cortex-M3 based microcontroller for embedded applications
requiring a high level of integration and low power dissipation.
The Cortex-M3 is a next generation core that offers better performance than the ARM7 at
the same clock rate and other system enhancements such as modernized debug features
and a higher level of support block integration. The Cortex-M3 CPU incorporates a
3-stage pipeline and has a Harvard architecture with separate local instruction and data
buses, as well as a third bus with slightly lower performance for peripherals. The
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
branches.
The LPC178x/7x adds a specialized flash memory accelerator to accomplish optimal
performance when executing code from flash. The LPC178x/7x is targeted to operate at
up to 100 MHz CPU frequency.
The peripheral complement of the LPC178x/7x includes up to 512 kB of flash program
memory, up to 96 kB of SRAM data memory, up to 4 kB of EEPROM data memory,
External Memory controller (EMC), LCD (LPC178x only), Ethernet, USB
Device/Host/OTG, a General Purpose DMA controller, five UARTs, three SSP controllers,
three I
Encoder Interface, four general purpose timers, a general purpose PWM with six outputs,
an ultra-low power RTC with separate battery supply, a windowed watchdog timer, a CRC
calculation engine, up to 165 general purpose I/O pins, and more. The pinout of
LPC178x/7x is intended to allow pin function compatibility with the LPC24xx and
LPC23xx.
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and
96 kB SRAM; USB Device/Host/OTG; Ethernet; LCD; EMC
Rev. 00.04 — 8 July 2010
Functional replacement for LPC23xx and 24xx family devices.
System:
2
ARM Cortex-M3 processor, running at frequencies of up to 100 MHz. A Memory
Protection Unit (MPU) supporting eight regions is included.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
Multilayer AHB matrix interconnect provides a separate bus for each AHB master.
AHB masters include the CPU, and General Purpose DMA controller. This
interconnect provides communication with no arbitration delays unless two masters
attempt to access the same slave at the same time.
Split APB bus allows for higher throughput with fewer stalls between the CPU and
DMA. A single level of write buffering allows the CPU to continue without waiting for
completion of APB writes if the APB was not already busy.
C-bus interfaces, an four-channel, 12-bit ADC, a 10-bit DAC, a Quadrature
Objective data sheet

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lpc1778 Summary of contents

Page 1

LPC178x/7x 32-bit ARM Cortex-M3 microcontroller 512 kB flash and 96 kB SRAM; USB Device/Host/OTG; Ethernet; LCD; EMC Rev. 00.04 — 8 July 2010 1. General description The LPC178x/ ARM Cortex-M3 based microcontroller for embedded applications requiring ...

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... NXP Semiconductors Cortex-M3 system tick timer, including an external clock input option. Standard JTAG test/debug interface as well as Serial Wire Debug and Serial WireTrace Port options. Emulation trace module supports real-time trace. Boundary scan for simplified board testing. Non-maskable Interrupt (NMI) input. Memory: 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities ...

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... NXP Semiconductors Digital peripherals: SD/MMC memory card interface 165 General Purpose I/O (GPIO) pins depending on the packaging, with configurable pull-up/down resistors, open-drain mode, and repeater mode. All GPIOs are located on an AHB bus for fast access and support Cortex-M3 bit-banding. GPIOs can be accessed by the General Purpose DMA Controller. Any pin of ports 0 and 2 can be used to generate an interrupt ...

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... LPC1778FET180 TFBGA180 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm LPC1778FBD144 LQFP144 LPC1777 plastic low profile quad flat package; 208 leads; body 28 × 28 × 1.4 mm LPC1777FBD208 ...

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... NXP Semiconductors Table 1. Ordering information Type number Package Name Description LPC1774 plastic low profile quad flat package; 208 leads; body 28 × 28 × 1.4 mm LPC1774FBD208 LQFP208 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm LPC1774FBD144 LQFP144 LPC1772 plastic low profile quad flat package; 208 leads; body 28 × 28 × 1.4 mm ...

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... SRAM SRAM (kB) (kB) LPC178x 16 × 2 LPC1788 512 64 16 × 2 LPC1787 512 64 LPC1786 256 64 16 LPC1785 256 64 16 LPC177x 16 × 2 LPC1778 512 64 16 × 2 LPC1777 512 64 LPC1776 256 64 16 LPC1774 128 32 8 LPC1772 [1] On 180-pin packages. [2] On 144-pin packages. LPC178x_7x ...

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... NXP Semiconductors 5. Block diagram debug JTAG port interface TEST/DEBUG INTERFACE ARM CORTEX-M3 I-code bus slave EMC slave (1) LCD slave HIGH-SPEED GPIO APB slave group 0 SSP1 UART0/1 I2C0/1 CAN 0/1 TIMER 0/1 WINDOWED WDT PWM1 12-bit ADC PIN CONNECT GPIO INTERRUPT CONTROL 32 kHz OSCILLATOR ...

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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration (LQFP208) Fig 3. Pin configuration (TFBGA208) LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller 1 LPC178x/7xFBD208 52 ball A1 index area LPC178x/ Transparent top view All information provided in this document is subject to legal disclaimers. Rev. 00.04 — ...

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... NXP Semiconductors Fig 4. Pin configuration (TFBGA180) Fig 5. Pin configuration (LQFP144) 6.2 Pin description I/O pins on the LPC178x/7x are 5V tolerant and have input hysteresis unless otherwise indicated in the table below. Crystal pins, power pins, and reference voltage pins are not 5V tolerant. In addition, when pins are selected to be ADC inputs, they are no longer 5V tolerant and must be limited to the voltage at the ADC positive reference pin (VREFP) ...

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... NXP Semiconductors Table 3. Pin description Not all functions are available on all parts. See Symbol P0[0] to P0[31] P0[0] / CAN_RD1 / 94 U15 M10 66 U3_TXD / I2C1_SDA / U0_TXD P0[1] / CAN_TD1 / 96 T14 N11 U3_RXD / I2C1_SCL / U0_RXD P0[2] / U0_TXD / 202 C4 D5 U3_TXD P0[3] / U0_RXD / 204 D6 A3 U3_RXD P0[4] / I2S_RX_SCK 168 B12 A11 / CAN_RD_2 / T2_CAP0 / LCD_VD[0] ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P0[6] / I2S_RX_SDA 164 D13 D11 / SSP1_SSEL / T2_MAT0 / U1_RTS / LCD_VD[8] P0[7] / I2S_TX_SCK 162 C13 B12 / SSP1_SCK / T2_MAT1 / LCD_VD[9] P0[8] / I2S_TX_WS / 160 A15 C12 SSP1_MISO / T2_MAT2 / LCD_VD[16] P0[9] / I2S_TX_SDA 158 C14 A13 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P0[11] / U2_RXD / 100 R14 P12 I2C2_SCL / T3_MAT1 P0[12 USB_PPWR2 / SSP1_MISO / ADC0_IN[6] P0[13 USB_UP_LED2 / SSP1_MOSI / ADC0_IN[7] P0[14 USB_HSTEN2 / SSP1_SSEL / USB_CONNECT2 P0[15] / U1_TXD / 128 J16 H13 SSP0_SCK P0[16] / U1_RXD / 130 J14 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P0[19] / U1_DSR / 122 L17 J10 SD_CLK / I2C1_SDA P0[20] / U1_DTR / 120 M17 K14 SD_CMD / I2C1_SCL P0[21] / U1_RI / 118 M16 K11 SD_PWR / U4_OE / CAN_RD1 P0[22] / U1_RTS / 116 N17 L14 SD_DAT[0] / U4_TXD / CAN_TD1 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P0[25] / ADC0_IN[ I2S_RX_SDA / U3_TXD P0[26] / ADC0_IN[ DAC_OUT / U3_RXD P0[27] / I2C0_SDA / USB_SDA1 P0[28] / I2C0_SCL / USB_SCL1 P0[29] / USB_D EINT_0 P0[30] / USB_D− EINT_1 P0[31] / USB_D P1[0] to P1[31] P1[0] / ENET_TXD0 196 A3 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[1] / ENET_TXD1 194 T3_MAT3 / SSP2_MOSI P1[2] / ENET_TXD2 185 SD_CLK / PWM0_1 P1[3] / ENET_TXD3 177 A10 A9 / SD_CMD / PWM0_2 P1[4] / 192 A5 C6 ENET_TX_EN / T3_MAT2 / SSP2_MISO P1[5] / 156 A17 B13 ENET_TX_ER / SD_PWR / PWM0_3 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[9] / ENET_RXD0 188 T3_MAT0 P1[10] / 186 C8 A7 ENET_RXD1 / T3_CAP0 P1[11] / 163 A14 A12 ENET_RXD2 / SD_DAT[2] / PWM0_6 P1[12] / 157 A16 A14 ENET_RXD3 / SD_DAT[3] / PWM0_CAP0 P1[13] / 147 D16 D14 ENET_RX_DV P1[14] / 184 A7 D8 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[18 USB_UP_LED1 / PWM1_1 / T1_CAP0 / SSP1_MISO P1[19 USB_TX_E1 / USB_PPWR1 / T1_CAP1 / MC_0A / SSP1_SCK / U2_OE P1[20 USB_TX_DP1 / PWM1_2 / QEI_PHA / MC_FB0 / SSP0_SCK / LCD_VD[6] / LCD_VD[10] P1[21 USB_TX_DM1 / PWM1_3 / SSP0_SSEL / MC_ABORT / LCD_VD[7]/ ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[22] / USB_RCV1 USB_PWRD1 / T1_MAT0 / MC_0B / SSP1_MOSI / LCD_VD[8] / LCD_VD[12] P1[23 USB_RX_DP1 / PWM1_4 / QEI_PHB / MC_FB1 / SSP0_MISO / LCD_VD[9]/ LCD_VD[13] P1[24 USB_RX_DM1 / PWM1_5 / QEI_IDX / MC_FB2 / SSP0_MOSI / LCD_VD[10] / LCD_VD[14] P1[25] / USB_LS1 / 80 T10 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[26 R10 P8 USB_SSPND1 / PWM1_6 / T0_CAP0 / MC_1B / SSP1_SSEL / LCD_VD[12] / LCD_VD[20] P1[27] / USB_INT1 / 88 T12 M9 USB_OVRCR1 / T0_CAP1 / CLKOUT / LCD_VD[13] / LCD_VD[21] P1[28] / USB_SCL1 90 T13 P10 / PWM1_CAP0 / T0_MAT0 / MC_2A / SSP0_SSEL / LCD_VD[14]/ LCD_VD[22] P1[29] / USB_SDA1 92 U14 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P1[30 USB_PWRD2 / USB_VBUS / ADC0_IN[4] / I2C0_SDA / U3_OE P1[31 USB_OVRCR2 / SSP1_SCK / ADC0_IN[5] / I2C0_SCL P2[0] to P2[31] P2[0] / PWM1[1] / 154 B17 D12 U1_TXD/ LCD_PWR P2[1] / PWM1[2] / 152 E14 C14 U1_RXD /LCD_LE P2[2] / PWM1[3] / 150 D15 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P2[3] / PWM1[4] / 144 E16 E13 U1_DCD / T2_MAT2 / TRACEDATA[2] / LCD_FP P2[4] / PWM1_5 / 142 D17 E14 U1_DSR / T2_MAT1 / TRACEDATA[1] / LCD_ENAB_M P2[5] / PWM1_6 / 140 F16 F12 U1_DTR / T2_MAT0 / TRACEDATA[0] / LCD_LP P2[6] / PWM1_CAP0 138 E17 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P2[8] / CAN_TD2 / 134 H15 G14 93 U2_TXD / U1_CTS / ENET_MDC / LCD_VD[2] / LCD_VD[6] P2[9] / 132 H16 H11 USB_CONNECT1 / U2_RXD / U4_RXD / ENET_MDIO / LCD_VD[3] / LCD_VD[7] P2[10] / EINT_0 / 110 N15 M13 76 NMI P2[11] / EINT1 / 108 T17 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P2[12] / EINT2 / 106 N14 N14 SD_DAT[2] / I2S_TX_WS / LCD_VD[4] / LCD_VD[3] / LCD_VD[8] / LCD_VD[18] P2[13] / EINT3 / 102 T16 M11 71 SD_DAT[3] / I2S_TX_SDA / LCD_VD[5] / LCD_VD[9] / LCD_VD[19] P2[14] / EMC_CS2 / 91 R12 - I2C1_SDA / T2_CAP0 P2[15] / EMC_CS3 / 99 P13 - I2C1_SCL / ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P2[19 EMC_CLK[1] P2[20 EMC_DYCS0 P2[21 U11 N8 EMC_DYCS1 P2[22 U12 - EMC_DYCS2 / SSP0_SCK / T3_CAP0 P2[23 EMC_DYCS3 / SSP0_SSEL / T3_CAP1 P2[24] / EMC_CKE0 P2[25] / EMC_CKE1 P2[26] / EMC_CKE2 SSP0_MISO / T3_MAT0 P2[27] / EMC_CKE3 SSP0_MOSI / T3_MAT1 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P2[30 EMC_DQM2 / I2C2_SDA / T3_MAT2 P2[31 EMC_DQM3 / I2C2_SCL / T3_MAT3 P3[0] to P3[31] P3[0] / EMC_D[0] 197 B4 D6 P3[1] / EMC_D[1] 201 B3 E6 P3[2] / EMC_D[2] 207 B1 A2 P3[3] / EMC_D[ P3[4] / EMC_D[ P3[5] / EMC_D[ P3[6] / EMC_D[ P3[7] / EMC_D[7] ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P3[11] / EMC_D[11] 208 D5 B2 P3[12] / EMC_D[12 P3[13] / EMC_D[13 P3[14] / EMC_D[14 P3[15] / EMC_D[15 P3[16] / EMC_D[16] 137 F17 - / PWM0_1 / U1_TXD P3[17] / EMC_D[17] 143 F15 - / PWM0_2 / U1_RXD P3[18] / EMC_D[18] 151 C15 - / PWM0_3 / U1_CTS ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P3[22] / EMC_D[22] 195 PWM0_CAP0 / U1_RI P3[23] / EMC_D[23 PWM1_CAP0 / T0_CAP0 P3[24] / EMC_D[24 PWM1[1] / T0_CAP1 P3[25] / EMC_D[25 PWM1[2] / T0_MAT0 P3[26] / EMC_D[26 PWM1[3] / T0_MAT1 / STCLK P3[27] / EMC_D[27] 203 PWM1[4] / T1_CAP0 P3[28] / EMC_D[28] ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P3[30] / EMC_D[30 U1_RTS / T1_MAT1 P3[31] / EMC_D[31 T1_MAT2 P4[0] to P4[31] P4[0] / EMC_A[ P4[1] / EMC_A[1] 79 U10 M7 P4[2] / EMC_A[2] 83 T11 M8 P4[3] / EMC_A[3] 97 U16 K9 P4[4] / EMC_A[4] 103 R15 P13 P4[5] / EMC_A[5] 107 R16 H10 P4[6] / EMC_A[6] 113 M14 K10 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P4[12] / EMC_A[12] 149 C16 F10 P4[13] / EMC_A[13] 155 B16 B14 P4[14] / EMC_A[14] 159 B15 E8 P4[15] / EMC_A[15] 173 A11 C10 P4[16] / EMC_A[16] 101 U17 N12 P4[17] / EMC_A[17] 104 P14 N13 P4[18] / EMC_A[18] 105 P15 ...

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... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P4[25] / EMC_WE 179 B9 D9 P4[26] / EMC_BLS0 119 L15 K13 P4[27] / EMC_BLS1 139 G15 F14 P4[28] / EMC_BLS2 170 C11 D10 / U3_TXD / T2_MAT0 / LCD_VD[6] / LCD_VD[10] / LCD_VD[2] P4[29] / 176 B10 B9 EMC_BLS[3] / U3_RXD / T2_MAT1 / I2C2_SCL / ...

Page 31

... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol P5[2] / T3_MAT2/ 117 L14 L12 I2C0_SDA P5[3] / U4_RXD / 141 G14 G10 98 I2C0_SCL P5[4] / U0_OE / 206 C3 C4 T3_MAT3 / U4_TXD JTAG_TDO (SWO JTAG_TDI JTAG_TMS (SWDIO) JTAG_TRST JTAG_TCK ...

Page 32

... NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See Symbol Vdda Vdd(3v3) 15, G3, E2, 60, P6, L4, 71, P8, K8, 89, U13, L11, 112, P17, J14, 125, K16, E12, 146, C17, E10, 165, B13, C5 181, C9, 198 D7 VREFP 33, ...

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... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol Row A 1 P3[27]/ EMC_D[27]/ 2 VSS PWM1[4]/ T1_CAP0 5 P1[4]/ ENET_TX_EN/ 6 P1[9]/ ENET_RXD0/ T3_MAT2/ T3_MAT0 SSP2_MISO 9 P1[17]/ ENET_MDIO/ 10 P1[3]/ ENET_TXD3/ I2S_RX_MCLK SD_CMD/ PWM0_2 13 P3[20]/ EMC_D[20]/ 14 P1[11]/ ENET_RXD2/ PWM0_5/ U1_DSR SD_DAT[2]/ PWM0_6 ...

Page 34

... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol 1 JTAG_TRST 2 P3[28]/ EMC_D[28]/ PWM1[5]/ T1_CAP1 5 P3[11]/ EMC_D[11] 6 P0[3]/ U0_RXD/ U3_RXD 9 P1[2]/ ENET_TXD2/ 10 P1[16]/ ENET_MDC/ SD_CLK/ PWM0_1 I2S_TX_MCLK 13 P0[6]/ I2S_RX_SDA/ 14 P1[7]/ ENET_COL/ SSP1_SSEL/ SD_DAT[1]/ PWM0_5 T2_MAT0/ U1_RTS/ LCD_VD[8] 17 P2[4]/ PWM1[5]/ - U1_DSR/ T2_MAT1/ ...

Page 35

... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol P5[3]/ U4_RXD/ I2C0_SCL 17 P4[10]/ EMC_A[10] 18 Row H 1 P0[23]/ ADC0_IN[0]/ 2 P3[14]/ EMC_D[14] I2S_RX_SCK/ T3_CAP0 VSS 17 P4[9]/ EMC_A[ Row J 1 P3[6]/ EMC_D[6] 2 VSSA ...

Page 36

... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol P4[6]/ EMC_A[6] 17 P0[20]/ U1_DTR SD_CMD/ I2C1_SCL Row N 1 RTC_ALARM 2 P2[31]/ EMC_DQM3/ I2C2_SCL/ T3_MAT3 P2[12]/ EINT2/ SD_DAT[2]/ I2S_TX_WS/ LCD_VD[4]/ LCD_VD[3]/ LCD_VD[8]/ LCD_VD[18] 17 P0[22]/ U1_RTS/ ...

Page 37

... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol 5 P3[24]/ EMC_D[24]/ 6 P0[30]/ USB_D-1/ PWM1[1]/ T0_CAP1 EINT1 9 VSS 10 P1[26]/ USB_SSPND1/ PWM1[6]/ T0_CAP0/ MC_1B/ SSP1_SSEL/ LCD_VD[12]/ LCD_VD[20] 13 P2[17]/ EMC_RAS 14 P0[11]/ U2_RXD/ I2C2_SCL/ T3_MAT1 17 P4[20]/ EMC_A[20 I2C2_SDA/ SSP1_SCK Row T 1 P0[27]/ I2C0_SDA/ ...

Page 38

... NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol 5 P2[23]/ EMC_DYCS3/ 6 P1[19]/ USB_TX_E1/ SSP0_SSEL/ USB_PPWR1/ T3_CAP1 T1_CAP1/ MC_0A/ SSP1_SCK/ U2_OE 9 P4[0]/ EMC_A[0] 10 P4[1]/ EMC_A[1] 13 VDD(3V3) 14 P1[29]/ USB_SDA1/ PWM1_CAP1/ T0_MAT1/ MC_2B/ U4_TXD/ LCD_VD[15]/ LCD_VD[23] 17 P4[16]/ EMC_A[16 Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts ...

Page 39

... NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol 9 P1[17]/ENET_MDIO/ 10 P4[15]/EMC_A[15] I2S_RX_MCLK 13 P1[7]/ENET_COL/ 14 P2[1]/PWM1_2/ SD_DAT[1]/PWM0_5 U1_RXD/LCD_LE Row D 1 P0[26]/ADC0_IN[3]/ 2 JTAG_TCK_SWDCLK 3 DAC_OUT/U3_RXD 5 P0[2]/U0_TXD/ 6 P3[0]/EMC_D[0] U3_TXD 9 P4[25]/EMC_WE 10 P4[28]/EMC_BLS[2]/ U3_TXD/ T2_MAT0/LCD_VD[6]/ LCD_VD[10]/ LCD_VD[2] ...

Page 40

... NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol 5 P3[3]/EMC_D[ P5[3]/EMC_A[27]/ SSP2_SSEL/U4_RXD /I2C0_SCL 13 Vss 14 P2[8]/CAN_TD_2/ U2_TXD/ U1_CTS/ENET_MDC/ LCD_VD[2]/ LCD_VD[6] Row H 1 P5[1]/EMC_A[25]/ 2 RSTOUT SSP2_MISO/ T2_MAT3 5 RTC_ALARM P4[5]/EMC_A[5] 13 P0[15]/U1_TXD/ 14 P0[16]/U1_RXD/ ...

Page 41

... NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol 13 P4[26]/EMC_BLS[0] 14 P0[20]/U1_DTR/ SD_CMD/I2C1_SCL Row L 1 P2[29]/EMC_DQM1 2 XTAL1 5 P1[18]/ 6 P4[0]/EMC_A[0] USB_UP_LED1/ PWM1_1/T1_CAP0/ SSP1_MISO 9 Vss 10 P0[10]/U2_TXD/ I2C2_SDA/T3_MAT0 13 Vss 14 P0[22]/U1_RTS/ SD_DAT[0]/U4_TXD/ CAN_TD1 Row M 1 P0[28]/I2C0_SCL/ ...

Page 42

... NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol 13 P4[17]/EMC_A[17] 14 P2[12]/EINT_2/ SD_DAT[2]/ I2S_TX_WS/ LCD_VD[4]/ LCD_VD[3]/ LCD_VD[8]/ LCD_VD[18] LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller Table 2 and Table 7 (EMC pins). Ball ...

Page 43

... NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol Row P 1 P2[24]/EMC_CKE0 2 P2[25]/EMC_CKE1 5 P1[19]/USB_TX_E1 6 P2[20]/EMC_DYCS0 /USB_PPWR1/ T1_CAP1/MC_0A/ SSP1_SCK/U2_OE 9 P2[16]/EMC_CAS 10 P1[28]/USB_SCL1/ PWM1_CAP0/ T0_MAT0/ MC_2A/SSP0_SSEL/ LCD_VD[14]/ LCD_VD[22] 13 P4[4]/EMC_A[4] 14 P4[18]/EMC_A[18] 7. Functional description 7.1 Architectural overview The ARM Cortex-M3 includes three AHB-Lite buses: the system bus, the I-code bus, and the D-code bus ...

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... NXP Semiconductors 7.3 On-chip flash program memory The LPC178x/7x contain up to 512 kB of on-chip flash program memory. A new two-port flash accelerator maximizes performance for use with the two fast AHB-Lite buses. 7.4 EEPROM The LPC178x/7x contains on-chip byte-erasable and byte-programmable EEPROM data memory. ...

Page 45

... NXP Semiconductors Table 6. LPC178x/177x memory usage and details Address range General Use 0x2000 0000 to On-chip SRAM 0x3FFF FFFF (typically used for peripheral data) AHB peripherals - 0x4000 0000 to APB Peripherals 0x7FFF FFFF 0x8000 0000 to Off-chip Memory via 0xDFFF FFFF the External Memory ...

Page 46

APB1 peripherals 0x4010 0000 31 system control 0x400F C000 reserved (1) 16 SD/MMC 0x400C 0000 (1) 15 QEI 0x400B C000 14 motor ...

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... NXP Semiconductors 7.8 Nested Vectored Interrupt Controller (NVIC) The NVIC is an integral part of the Cortex-M3. The tight coupling to the CPU allows for low interrupt latency and efficient processing of late arriving interrupts. 7.8.1 Features • Controls system exceptions and peripheral interrupts • In the LPC178x/7x, the NVIC supports 41 vectored interrupts • ...

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... LPC1788FBD208 EMC_D[31:0] EMC_A[23:0] LPC1788FET208 EMC_D[31:0] EMC_A[23:0] LPC1788FET180 EMC_D[15:0] EMC_A[19:0] LPC1788FBD144 EMC_D[7:0] EMC_A[15:0] LPC1787FBD208 EMC_D[31:0] EMC_A[23:0] LPC1786FBD208 EMC_D[31:0] EMC_A[23:0] LPC1785FBD208 EMC_D[31:0] EMC_A[23:0] LPC1778FBD208 EMC_D[31:0] EMC_A[23:0] LPC1778FET208 EMC_D[31:0] EMC_A[23:0] LPC1778FET180 EMC_D[15:0] EMC_A[19:0] LPC1778FBD144 EMC_D[7:0] EMC_A[15:0] LPC1777FBD208 EMC_D[31:0] EMC_A[23:0] LPC1776FBD208 EMC_D[31:0] EMC_A[23:0] LPC1776FET180 EMC_D[15:0] ...

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... NXP Semiconductors Table 7. External memory controller pin configuration Part Data bus pins Address bus pins LPC1774FBD144 EMC_D[7:0] EMC_A[15:0] LPC1772FBD208 EMC_D[31:0] EMC_A[23:0] LPC1772FBD144 EMC_D[7:0] EMC_A[15:0] The LPC178x/7x EMC is an ARM PrimeCell MultiPort Memory Controller peripheral offering support for asynchronous static memory devices such as RAM, ROM, and flash. ...

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... NXP Semiconductors 7.11 General purpose DMA controller The GPDMA is an AMBA AHB compliant peripheral allowing selected peripherals to have DMA support. The GPDMA enables peripheral-to-memory, memory-to-peripheral, peripheral-to-peripheral, and memory-to-memory transactions. The source and destination areas can each be either a memory region or a peripheral, and can be accessed through the AHB master ...

Page 51

... NXP Semiconductors 7.12.1 Features • Supports three common polynomials CRC-CCITT, CRC-16, and CRC-32. – CRC-CCITT: x – CRC-16: x – CRC-32: x • Bit order reverse and 1’s complement programmable setting for input data and CRC sum. • Programmable seed number setting. • Supports CPU PIO or DMA back-to-back transfer. ...

Page 52

... LCD panel clock may be generated from the peripheral clock, or from a clock input pin. 7.14 Ethernet Remark: The Ethernet block is available on parts LPC1788/86 and LPC1778/76. The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration ...

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... USB interface Remark: The USB Device/Host/OTG controller is available on parts LPC1788/87/86/85 and LPC1778/77/76. The USB Device-only controller is available on parts LPC1774/72. The Universal Serial Bus (USB 4-wire bus that supports communication between a host and one or more (up to 127) peripherals. The host controller allocates the USB bandwidth to attached devices through a token-based protocol ...

Page 54

... Supports any OTG transceiver compliant with the OTG Transceiver Specification (CEA-2011), Rev. 1.0. 7.16 SD/MMC card interface Remark: The SD/MMC card interface is available on parts LPC1788/87/86 and parts LPC1778/77/76. The Secure Digital and Multimedia Card Interface (MCI) allows access to external SD memory cards. The SD card interface conforms to the SD Multimedia Card Specification Version 2.11. ...

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... NXP Semiconductors • Can be used as a multimedia card bus or a secure digital memory card bus host. The SD/MMC can be connected to several multimedia cards or a single secure digital memory card. • DMA supported through the GPDMA controller. 7.17 Fast general purpose parallel I/O Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers ...

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... NXP Semiconductors • Individual channels can be selected for conversion. • Burst conversion mode for single or multiple inputs. • Optional conversion on transition of input pin or Timer Match signal. • Individual result registers for each ADC channel to reduce interrupt overhead. • DMA support. 7.19 10-bit DAC The LPC178x/7x contain one DAC ...

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... NXP Semiconductors 7.21 SSP serial I/O controller The LPC178x/7x contain three SSP controllers. The SSP controller is capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the bus. Only a single master and a single slave can communicate on the bus during a given data transfer ...

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... NXP Semiconductors • 2 The I C-bus can be used for test and diagnostic purposes. • 2 Both I C-bus controllers support multiple address recognition and a bus monitor mode. 2 7.23 I S-bus serial I/O controllers The LPC178x/7x contain one I communication interface for digital audio applications. 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word select signal ...

Page 59

... NXP Semiconductors • Data rates to 1 Mbit/s on each bus. • 32-bit register and RAM access. • Compatible with CAN specification 2.0B, ISO 11898-1. • Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN buses. • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard Identifiers. • ...

Page 60

... NXP Semiconductors The ability to separately control rising and falling edge locations allows the PWM to be used for more applications. For instance, multi-phase motor control typically requires three non-overlapping PWM outputs with individual control of all three pulse widths and positions. Two match registers can be used to provide a single edge controlled PWM output. One match register (PWMMR0) controls the PWM cycle rate, by resetting the count upon match ...

Page 61

... PWM is highly configurable for other generalized timing, counting, capture, and compare applications. 7.28 Quadrature Encoder Interface (QEI) Remark: The QEI is available on parts LPC1788/87/86 and LPC1778/77/76 A quadrature encoder, also known as a 2-channel incremental encoder, converts angular displacement into two pulse signals. By monitoring both the number of pulses and the relative phase of the two signals, the user can track the position, direction of rotation, and velocity ...

Page 62

... NXP Semiconductors 7.30.1 Features • Internally resets chip if not periodically reloaded during the programmable time-out period. • Optional windowed operation requires reload to occur between a minimum and maximum time period, both programmable. • Optional warning interrupt can be generated at a programmable time prior to watchdog time-out. ...

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... NXP Semiconductors • Backup registers (20 bytes) powered by VBAT. • RTC power supply is isolated from the rest of the chip. 7.32 Clocking and power control 7.32.1 Crystal oscillators The LPC178x/7x include three independent oscillators. These are the main oscillator, the IRC oscillator, and the RTC oscillator. Each oscillator can be used for more than one purpose as required in a particular application ...

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... NXP Semiconductors IRC oscillator system oscillator Fig 7. LPC178x/7x clock generation block diagram 7.32.1.1 Internal RC oscillator The IRC may be used as the clock source for the WDT, and/or as the clock that drives the PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC is trimmed accuracy over the entire voltage and temperature range ...

Page 65

... NXP Semiconductors The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted to a higher frequency the maximum CPU operating frequency, by the main PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock frequency is referred to as CCLK elsewhere in this document. The frequencies of PLLCLKIN and CCLK are the same value unless the PLL is active and connected ...

Page 66

... NXP Semiconductors whenever any of the aforementioned functions are turned off for any reason. Since the oscillator and other functions are turned off during Power-down mode, any wake-up of the processor from Power-down mode makes use of the wake-up Timer. The Wake-up Timer monitors the crystal oscillator to check whether it is safe to begin code execution ...

Page 67

... NXP Semiconductors The Deep-sleep mode can be terminated and normal operation resumed by either a Reset or certain specific interrupts that are able to function without clocks. Since all dynamic operation of the chip is suspended, Deep-sleep mode reduces chip power consumption to a very low value. Power to the flash memory is left on in Deep-sleep mode, allowing a very quick wake-up ...

Page 68

... NXP Semiconductors 7.32.7 Power domains The LPC178x/7x provide two independent power domains that allow the bulk of the device to have power removed while maintaining operation of the RTC and the backup Registers. On the LPC178x/7x, I/O pads are powered by the 3 DD(REG)(3V3) CPU and most of the peripherals. ...

Page 69

... NXP Semiconductors V Fig 8. Power distribution 7.33 System control 7.33.1 Reset Reset has four sources on the LPC178x/7x: the RESET pin, the Watchdog reset, Power-On Reset (POR), and the BrownOut Detection (BOD) circuit. The RESET pin is a Schmitt trigger input pin. Assertion of chip Reset by any source, once the operating ...

Page 70

... NXP Semiconductors 7.33.2 Brownout detection The LPC178x/7x include 2-stage monitoring of the voltage on the V voltage falls below 2.95 V, the BOD asserts an interrupt signal to the Vectored Interrupt Controller. This signal can be enabled for interrupt in the Interrupt Enable Register in the NVIC in order to cause a CPU interrupt; if not, software can monitor the signal by reading a dedicated status register ...

Page 71

... NXP Semiconductors 7.33.5 AHB multilayer matrix The LPC178x/7x use an AHB multilayer matrix. This matrix connects the instruction (I-code) and data (D-code) CPU buses of the ARM Cortex-M3 to the flash memory, the main (32 kB) static RAM, and the Boot ROM. The GPDMA can also access all of these memories ...

Page 72

... NXP Semiconductors 8. Limiting values Table 8. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V regulator supply voltage (3.3 V) DD(REG)(3V3) V analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREFP i(VREFP) ...

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... NXP Semiconductors 9. Thermal characteristics 9.1 Thermal characteristics The average chip junction temperature, T equation amb • ambient temperature (°C), amb • the package junction-to-ambient thermal resistance (°C/W) th(j-a) • sum of internal and I/O power dissipation D The internal power dissipation is the product of I the I/O pins is often small and many times can be negligible. However it can be significant in some applications ...

Page 74

... NXP Semiconductors 10. Static characteristics Table 10. Static characteristics − ° ° +85 C, unless otherwise specified. amb Symbol Parameter Supply pins V supply voltage (3.3 V) DD(3V3) V regulator supply voltage DD(REG)(3V3) (3 analog 3.3 V pad supply DDA voltage V input voltage on pin i(VBAT) VBAT V input voltage on pin ...

Page 75

... NXP Semiconductors Table 10. Static characteristics …continued − ° ° +85 C, unless otherwise specified. amb Symbol Parameter I LOW-level input current HIGH-level input IH current I OFF-state output OZ current V input voltage I V output voltage O V HIGH-level input IH voltage V LOW-level input voltage IL V hysteresis voltage ...

Page 76

... NXP Semiconductors Table 10. Static characteristics …continued − ° ° +85 C, unless otherwise specified. amb Symbol Parameter V differential input DI sensitivity voltage V differential common CM mode voltage range V single-ended receiver th(rs)se switching threshold voltage V LOW-level output OL voltage for low-/full-speed V HIGH-level output OH voltage (driven) for ...

Page 77

... NXP Semiconductors 10.1 Power consumption Conditions: V Fig 9. Deep-sleep mode: Regulator supply current ( Conditions: V Fig 10. Power-down mode: Regulator supply current I LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller <tbd> 3.3 V; BOD disabled. DD(Reg)(3V3) < ...

Page 78

... NXP Semiconductors Conditions: V Fig 11. Deep power-down mode: Battery supply current I LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller <tbd> 3 floating; RTC not running. BAT DD(Reg)(3V3) All information provided in this document is subject to legal disclaimers. Rev. 00.04 — 8 July 2010 ...

Page 79

... NXP Semiconductors 10.2 Electrical pin characteristics 3 (V) 3.2 2.8 2 Conditions: V Fig 12. Typical HIGH-level output voltage (mA Conditions: V Fig 13. Typical LOW-level output current I LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller °C 25 °C −40 ° 3.3 V; standard port pins. ...

Page 80

... NXP Semiconductors + (μA) −10 −30 −50 −70 Conditions: V Fig 14. Typical pull-up current (μ −10 0 Conditions: V Fig 15. Typical pull-down current I LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller °C 25 °C −40 ° 3.3 V; standard port pins. ...

Page 81

... NXP Semiconductors 11. Dynamic characteristics 11.1 Flash memory Table 11. Flash characteristics − ° +85 amb Symbol N endu t ret prog [1] Number of program/erase cycles. [2] Programming times are given for writing 256 bytes from RAM to the flash. Data must be written to the flash in blocks of 256 bytes. ...

Page 82

External memory interface Table 13. Dynamic characteristics: Static external memory interface − ° ° pF ...

Page 83

Table 13. Dynamic characteristics: Static external memory interface − ° ° pF ...

Page 84

... NXP Semiconductors Table 14. Dynamic characteristics: Dynamic external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol Parameter Common t chip select valid delay time d(SV) t chip select hold time h(S) t row address strobe valid delay time d(RASV) t row address strobe hold time ...

Page 85

... NXP Semiconductors CS BLS/WE addr data OE Fig 17. External memory write access Fig 18. Signal timing 11.3 External clock Table 15. Dynamic characteristic: external clock − ° +85 amb Symbol f osc T cy(clk) t CHCX t CLCX t CLCH t CHCL [1] Parameters are valid over operating temperature range unless otherwise specified. ...

Page 86

... NXP Semiconductors Fig 19. External clock timing (with an amplitude of at least V 11.4 Internal oscillators Table 16. Dynamic characteristic: internal oscillators − ° +85 amb Symbol f osc(RC) f i(RTC) [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply [2] voltages ...

Page 87

... NXP Semiconductors 11.5 I/O pins Table 17. Dynamic characteristic: I/O pins − ° +85 amb Symbol [1] Applies to standard port pins and RESET pin. 11.6 SSP interface Table 18. Dynamic characteristics: SSP pins in SPI mode Symbol Parameter PCLK cycle time T cy(PCLK) T clock cycle time cy(clk) ...

Page 88

... NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) MOSI MISO MOSI MISO Fig 21. SSP master timing in SPI mode LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller T t cy(clk) clk(H) t v(Q) DATA VALID DATA VALID t DS DATA VALID t v(Q) DATA VALID DATA VALID DATA VALID DATA VALID All information provided in this document is subject to legal disclaimers ...

Page 89

... NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) MOSI MISO MOSI MISO Fig 22. SSP slave timing in SPI mode 2 11.7 I C-bus Table 19. Dynamic characteristic: I − ° +85 amb Symbol f SCL LOW t HIGH LPC178x_7x Objective data sheet T cy(clk) DATA VALID t v(Q) DATA VALID t DS ...

Page 90

... NXP Semiconductors Table 19. Dynamic characteristic: I − ° +85 amb Symbol t HD;DAT t SU;DAT 2 [1] See the I C-bus specification UM10204 for details. [2] Parameters are valid over operating temperature range unless otherwise specified. [ the data hold time that is measured from the falling edge of SCL; applies to data in transmission HD ...

Page 91

... NXP Semiconductors 2 11.8 I S-bus interface Table 20. Dynamic characteristics: I − ° ° +85 C. amb Symbol Parameter common to input and output t rise time r t fall time f t pulse width HIGH WH t pulse width LOW WL output t data output valid time v(Q) input t data input set-up time ...

Page 92

... NXP Semiconductors I2SRX_CLK I2SRX_SDA I2SRX_WS 2 Fig 25. I S-bus timing (input) 11.9 USB Table 21. Dynamic characteristics of USB pins (full-speed) Ω pF 1 DD(3V3) Symbol Parameter t rise time r t fall time f t differential rise and fall time FRFM matching V output signal crossover voltage ...

Page 93

... SE0/EOP skew n × t PERIOD Fig 26. Differential data-to-EOP transition skew and EOP width 11.10 Ethernet Remark: The Ethernet block is available on parts LPC1788/86 and LPC1778/76. Table 22. Dynamic characteristics: Ethernet Values listed describe design constraints. Symbol Parameter T clock cycle time cy(clk) Fig 27 ...

Page 94

... NXP Semiconductors Table 24. Dynamic characteristics: SD/MMC Values listed describe design constraints. Symbol Parameter T clock cycle time cy(clk) Output (chip to SD/MMC card) Input (SD/MMC card to chip) Fig 29. SD/MMC timing 12. ADC electrical characteristics Table 25. ADC characteristics DDA Symbol Parameter V analog input voltage ...

Page 95

... NXP Semiconductors 4095 4094 4093 4092 4091 4090 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error ( (4) Integral non-linearity (E ). L(adj) (5) Center of a step of the actual transfer curve. ...

Page 96

... NXP Semiconductors COMPARATOR The values of resistor components R process-dependent. Fig 31. ADC interface to pins ADC0_IN[n] Table 26. ADC interface components Component 13. DAC electrical characteristics Table 27. DAC electrical characteristics DDA Symbol Parameter E differential linearity D error E integral non-linearity L(adj) E offset error ...

Page 97

... NXP Semiconductors 14. Application information 14.1 Suggested USB interface solutions Remark: The USB controller is available as a device/Host/OTG controller on parts LPC1788/87/86/85 and LPC1778/77/76 and as device-only controller on parts LPC1774/72. LPC17xx Fig 32. USB interface on a self-powered device LPC17xx Fig 33. USB interface on a bus-powered device LPC178x_7x Objective data sheet ...

Page 98

... NXP Semiconductors RSTOUT LPC17xx USB_SCL USB_SDA EINTn USB_D+ USB_D− USB_UP_LED Fig 34. USB OTG port configuration USB_UP_LED USB_D+ USB_D− LPC17xx USB_PWRD USB_OVRCR USB_PPWR Fig 35. USB host port configuration LPC178x_7x Objective data sheet V DD RESET_N ADR/PSW OE_N/INT_N V DD SPEED ISP1302 SUSPEND ...

Page 99

... NXP Semiconductors USB_UP_LED USB_CONNECT LPC17xx USB_D+ USB_D− V BUS Fig 36. USB device port configuration 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through a capacitor with C = 100 pF ...

Page 100

... NXP Semiconductors Fig 38. Oscillator modes and models: oscillation mode of operation and external crystal model used for C Table 28. Recommended values for C components parameters): low frequency mode Fundamental oscillation frequency F OSC 1 MHz - 5 MHz 5 MHz - 10 MHz 10 MHz - 15 MHz 15 MHz - 20 MHz Table 29. Recommended values for C ...

Page 101

... NXP Semiconductors order to keep the noise coupled in via the PCB as small as possible. Also parasitics should stay as small as possible. Values of C accordingly to the increase in parasitics of the PCB layout. 14.4 Standard I/O pin configuration Figure 39 shows the possible pin modes for standard I/O pins with analog input function: • ...

Page 102

... NXP Semiconductors 14.5 Reset pin configuration reset Fig 40. Reset pin configuration LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller GLITCH FILTER All information provided in this document is subject to legal disclaimers. Rev. 00.04 — 8 July 2010 LPC178x/ ESD PIN ESD ...

Page 103

... NXP Semiconductors 15. Package outline LQFP208; plastic low profile quad flat package; 208 leads; body 1 156 157 pin 1 index 208 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 0.27 mm 1.6 0.25 0.05 1.35 0.17 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 104

... NXP Semiconductors TFBGA208: plastic thin fine-pitch ball grid array package; 208 balls; body 0.7 mm ball A1 index area ball index area DIMENSIONS (mm are the original dimensions) A UNIT ...

Page 105

... NXP Semiconductors TFBGA180: thin fine-pitch ball grid array package; 180 balls; body 0.8 mm ball A1 index area ball A1 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.35 0.85 0.5 12.2 mm 1.2 0.25 0.75 0.4 11.8 OUTLINE ...

Page 106

... NXP Semiconductors LQFP144: plastic low profile quad flat package; 144 leads; body 1 108 109 pin 1 index 144 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 0.27 0.20 mm 1.6 0.25 0.05 1.35 0.17 0.09 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 107

... NXP Semiconductors 16. Abbreviations Table 30. Abbreviations Acronym ADC AHB AMBA APB BOD CAN DAC DCC DMA DSP EOP ETM GPIO IRC IrDA JTAG MAC MIIM OHCI OTG PHY PLL PWM RIT RMII SE0 SPI SSI SSP TCM TTL UART USB LPC178x_7x Objective data sheet ...

Page 108

... NXP Semiconductors 17. Revision history Table 31. Revision history Document ID Release date LPC178x_7x_0.04 <tbd> LPC178x_7x Objective data sheet 32-bit ARM Cortex-M3 microcontroller Data sheet status Change notice Objective data sheet - All information provided in this document is subject to legal disclaimers. Rev. 00.04 — 8 July 2010 LPC178x/7x ...

Page 109

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 110

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 111

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 8 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Functional description . . . . . . . . . . . . . . . . . . 43 7.1 Architectural overview . . . . . . . . . . . . . . . . . . 43 7.2 ARM Cortex-M3 processor . . . . . . . . . . . . . . . 43 7.3 On-chip flash program memory . . . . . . . . . . . 44 7.4 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 7.5 On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 44 7.6 Memory Protection Unit (MPU ...

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... NXP Semiconductors 9.1 Thermal characteristics Static characteristics 10.1 Power consumption . . . . . . . . . . . . . . . . . . . . 77 10.2 Electrical pin characteristics . . . . . . . . . . . . . . 79 11 Dynamic characteristics . . . . . . . . . . . . . . . . . 81 11.1 Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . 81 11.2 External memory interface . . . . . . . . . . . . . . . 82 11.3 External clock . . . . . . . . . . . . . . . . . . . . . . . . . 85 11.4 Internal oscillators 11.5 I/O pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 11.6 SSP interface . . . . . . . . . . . . . . . . . . . . . . . . . 87 2 11.7 I C-bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 2 11.8 I S-bus interface . . . . . . . . . . . . . . . . . . . . . . . 91 11.9 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 11.10 Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.11 LCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.12 SD/MMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 12 ADC electrical characteristics . . . . . . . . . . . . 94 13 DAC electrical characteristics ...

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