r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 12

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r5f21346mnfp

Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r5f21346mnfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.
13.
14.
15.
11.7
11.8
12.1
12.2
12.3
12.4
12.5
13.1
13.2
13.3
14.1
14.2
14.3
15.1
15.2
11.8.1
11.8.2
11.8.3
11.8.4
11.8.5
12.5.1
13.2.1
13.2.2
13.3.1
14.2.1
14.2.2
14.2.3
14.2.4
14.2.5
14.2.6
14.2.7
14.3.1
14.3.2
14.3.3
15.2.1
15.2.2
15.2.3
15.2.4
15.2.5
ID Code Areas ............................................................................................................................ 172
Option Function Select Area ....................................................................................................... 176
Watchdog Timer .......................................................................................................................... 180
DTC ............................................................................................................................................ 189
Timer RC Interrupt, Timer RD Interrupt, Synchronous Serial Communication Unit Interrupt,
I
Sources) ................................................................................................................................................. 167
Notes on Interrupts ................................................................................................................................ 169
Overview ............................................................................................................................................... 172
Functions ............................................................................................................................................... 173
Forced Erase Function ........................................................................................................................... 174
Standard Serial I/O Mode Disabled Function ....................................................................................... 174
Notes on ID Code Areas ........................................................................................................................ 175
Overview ............................................................................................................................................... 176
Registers ................................................................................................................................................ 177
Notes on Option Function Select Area .................................................................................................. 179
Overview ............................................................................................................................................... 180
Registers ................................................................................................................................................ 182
Overview ............................................................................................................................................... 189
Registers ................................................................................................................................................ 190
Functional Description ......................................................................................................................... 186
2
C bus Interface Interrupt, and Flash Memory Interrupt (Interrupts with Multiple Interrupt Request
Reading Address 00000h .................................................................................................................. 169
SP Setting .......................................................................................................................................... 169
External Interrupt and Key Input Interrupt ....................................................................................... 169
Changing Interrupt Sources .............................................................................................................. 170
Rewriting Interrupt Control Register ................................................................................................ 171
Setting Example of ID Code Areas ................................................................................................... 175
Option Function Select Register (OFS) ............................................................................................ 177
Option Function Select Register 2 (OFS2) ....................................................................................... 178
Setting Example of Option Function Select Area ............................................................................. 179
Processor Mode Register 1 (PM1) .................................................................................................... 182
Watchdog Timer Reset Register (WDTR) ........................................................................................ 182
Watchdog Timer Start Register (WDTS) ......................................................................................... 182
Watchdog Timer Control Register (WDTC) .................................................................................... 183
Count Source Protection Mode Register (CSPR) ............................................................................. 183
Option Function Select Register (OFS) ............................................................................................ 184
Option Function Select Register 2 (OFS2) ....................................................................................... 185
Common Items for Multiple Modes ................................................................................................. 186
Count Source Protection Mode Disabled .......................................................................................... 187
Count Source Protection Mode Enabled ........................................................................................... 188
DTC Control Register j (DTCCRj) (j = 0 to 23) ............................................................................... 191
DTC Block Size Register j (DTBLSj) (j = 0 to 23) .......................................................................... 191
DTC Transfer Count Register j (DTCCTj) (j = 0 to 23) ................................................................... 192
DTC Transfer Count Reload Register j (DTRLDj) (j = 0 to 23) ...................................................... 192
DTC Source Address Register j (DTSARj) (j = 0 to 23) .................................................................. 192
A - 5

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