r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 166

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
9.7.3
Table 9.5
Key input interrupt
INT0 to INT4 interrupt
Timer RA interrupt
Serial interface interrupt
Voltage monitor 1 interrupt Usable in digital filter disabled mode (VW1C1 bit in VW1C register is set to 1)
Voltage monitor 2 interrupt Usable in digital filter disabled mode (VW2C1 bit in VW2C register is set to 1)
Comparator A1 interrupt
Comparator A2 interrupt
9.7.3.1
9.7.3.2
Since all oscillator circuits except fOCO-WDT stop in stop mode, the CPU and peripheral function clocks stop
and the CPU and the peripheral functions operating with these clocks also stop. The least power required to
operate the MCU is in stop mode. If the voltage applied to the VCC pin is VRAM or more, the contents of
internal RAM is retained.
The peripheral functions clocked by external signals continue operating.
Table 9.5 lists Interrupts to Exit Stop Mode and Usage Conditions.
The MCU enters stop mode when the CM10 bit in the CM1 register is set to 1 (all clocks stop). At the same
time, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode).
To use stop mode, set the following before the MCU enters stop mode:
•
•
Enter stop mode after setting the FMR27 bit to 0 (low-current-consumption read mode disabled). Do not enter
stop mode while the FMR27 bit is 1 (low-current-consumption read mode enabled).
When the high-speed on-chip oscillator mode is selected as the system clock, do not enter stop mode while bits
CM37 and CM36 in the CM3 register is 00b (MCU exits with the CPU clock used immediately before entering
wait or stop mode).
The I/O port retains the status immediately before the MCU enters stop mode.
However, when the CM13 bit in the CM1 register is set to 1 (XIN-XOUT pin), the XOUT(P4_7) pin is held
“H”. When the CM13 bit is set to 0 (I/O ports P4_6 and P4_7), P4_6 (XIN) and P4_7 (XOUT) each retain the
previous I/O status.
Bits OCD1 to OCD0 in the OCD register = 00b
CM35 bit in CM3 register = 0 (settings of CM06 bit in CM0 register and bits CM16 and CM17 in CM1
register enabled)
Interrupt
Stop Mode
Entering Stop Mode
Pin Status in Stop Mode
Interrupts to Exit Stop Mode and Usage Conditions
Usable
Usable if there is no filter
Usable if there is no filter when external pulse is counted in event counter
mode
When external clock selected
Usable in digital filter disabled mode (VW1C1 bit in VW1C register is set to 1)
Usable in digital filter disabled mode (VW2C1 bit in VW2C register is set to 1)
Usage Conditions
9. Clock Generation Circuit
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