r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 167

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 9.7
9.7.3.3
Stop mode
Interrupt request generation
(flash memory operates)
(flash memory stops)
The MCU exits stop mode by a reset or peripheral function interrupt.
Figure 9.7 shows the Time from Stop Mode to Interrupt Routine Execution.
To use a peripheral function interrupt to exit stop mode, set up the following before setting the CM10 bit to 1.
(1) Set the interrupt priority level in bits ILVL2 to ILVL0 of the peripheral function interrupts to be used for
(2) Set the I flag to 1.
(3) Operate the peripheral function to be used for exiting stop mode.
The clock used immediately before stop mode divided by 8 is used as the CPU clock when the MCU exits stop
mode by a peripheral function interrupt. To enter stop mode, set the CM35 bit in the CM3 register to 0 (settings
of CM06 bit in CM0 register and bits CM16 and CM17 in CM1 register enabled)
FMR0 Register
FMSTP Bit
exiting stop mode. Set bits ILVL2 to ILVL0 of the peripheral function interrupts that are not to be used for
exiting stop mode to 000b (interrupt disabled).
When the MCU exits stop mode by a peripheral function interrupt, the interrupt sequence is executed when
an interrupt request is generated and the CPU clock supply starts.
0
1
stabilization time
100 µs (max.)
Internal power
Exiting Stop Mode
Time from Stop Mode to Interrupt Routine Execution
T0
Oscillation time of CPU clock
Stabilization Time (T0)
source used immediately
Internal Power
before stop mode
100 µs (max.)
100 µs (max.)
T1
Period of system clock
Period of system clock
activation sequence
× 1 cycle + 60 µs
Activation (T2)
Flash Memory
Flash memory
Time until
× 1 cycle
(max.)
T2
Period of CPU clock
restart sequence
Same as above
Supply (T3)
CPU Clock
× 2 cycles
CPU clock
Time until
T3
Period of CPU clock
Interrupt sequence
Same as above
Sequence (T4)
× 20 cycles
9. Clock Generation Circuit
Time for
Interrupt
T4
The total of T0
to T4 is the time
from wait mode to
interrupt routine
execution.
Page 135 of 740
Remarks