r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 201

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r5f21346mnfp

Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21346mnfp#V0
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
11.8
11.8.1
11.8.2
11.8.3
Do not read address 00000h by a program. When a maskable interrupt request is acknowledged, the CPU reads
interrupt information (interrupt number and interrupt request level) from 00000h in the interrupt sequence. At
this time, the IR bit for the acknowledged interrupt is set to 0.
If address 00000h is read by a program, the IR bit for the interrupt which has the highest priority among the
enabled interrupts is set to 0. This may cause the interrupt to be canceled, or an unexpected interrupt to be
generated.
Set a value in the SP before an interrupt is acknowledged. The SP is set to 0000h after a reset. If an interrupt is
acknowledged before setting a value in the SP, the program may run out of control.
Either the “L” level width or “H” level width shown in the Electrical Characteristics is required for the signal
input to pins INT0 to INT4 and pins KI0 to KI3, regardless of the CPU clock.
For details, refer to Table 34.23 (VCC = 5V), Table 34.29 (VCC = 3V), Table 34.35 (VCC = 2.2V) External
Interrupt INTi (i = 0 to 4) Input, Key Input Interrupt KIi (i = 0 to 3).
Notes on Interrupts
Reading Address 00000h
SP Setting
External Interrupt and Key Input Interrupt
Page 169 of 740
11. Interrupts

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