r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 250

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
17.4
Table 17.3
Note:
Count sources
Count operations
Divide ratio
Count start condition
Count stop conditions • 0 (count stops) is written to the TSTART bit in the TRACR register.
Interrupt request
generation timing
TRAIO pin function
TRAO pin function
Read from timer
Write to timer
Selectable functions
In pulse output mode, the internally generated count source is counted, and a pulse with inverted polarity is output
from the TRAIO pin each time the timer underflows (refer to Table 17.3 Pulse Output Mode Specifications).
1. The level of the output pulse becomes the level when the pulse output starts when the TRAMR
register is written to.
Pulse Output Mode
Item
Pulse Output Mode Specifications
1 (count starts) is written to the TSTART bit in the TRACR register.
f1, f2, f8, fOCO, fC32, fC
• Decrement
• When the timer underflows, the contents in the reload register is reloaded and
1/(n+1)(m+1)
n: Value set in TRAPRE register, m: Value set in TRA register
• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.
When timer RA underflows [timer RA interrupt].
Pulse output, programmable output port
Programmable I/O port or inverted output of TRAIO
The count value can be read by reading registers TRA and TRAPRE.
• When registers TRAPRE and TRA are written while the count is stopped, values
• When registers TRAPRE and TRA are written during the count, values are
• TRAIO signal polarity switch function
• TRAO output function
• Pulse output stop function
• TRAIO pin select function
• TRAO pin select function
the count is continued.
are written to both the reload register and counter.
written to the reload register and counter (refer to 17.3.2 Timer Write Control
during Count Operation ).
The level when the pulse output starts is selected by the TEDGSEL bit in the
TRAIOC register.
Pulses inverted from the TRAIO output polarity can be output from the TRAO pin
(selectable by the TOENA bit in the TRAIOC register).
Output from the TRAIO pin is stopped by the TOPCR bit in the TRAIOC register.
P1_5 or P1_7 is selected by bits TRAIOSEL0 to TRAIOSEL1 in the TRASR
register.
P3_0 or P3_7 is selected by the TRAOSEL0 bit in the TRASR register.
(1)
Specification
Page 218 of 740
17. Timer RA