r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 254

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r5f21346mnfp

Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
17.6
Table 17.5
Count sources
Count operations
Count start condition
Count stop conditions
Interrupt request
generation timing
TRAIO pin function
TRAO pin function
Read from timer
Write to timer
Selectable functions
In pulse width measurement mode, the pulse width of an external signal input to the TRAIO pin is measured (refer
to Table 17.5 Pulse Width Measurement Mode Specifications).
Figure 17.3 shows an Operating Example of Pulse Width Measurement Mode.
Pulse Width Measurement Mode
Item
Pulse Width Measurement Mode Specifications
f1, f2, f8, fOCO, fC32, fC
• Decrement
• Continuously counts the selected signal only when measurement pulse is “H”
• When the timer underflows, the contents of the reload register are reloaded
1 (count starts) is written to the TSTART bit in the TRACR register.
• 0 (count stops) is written to the TSTART bit in the TRACR register.
• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.
• When timer RA underflows [timer RA interrupt].
• Rising or falling of the TRAIO input (end of measurement period) [timer RA
Measured pulse input
The count value can be read by reading registers TRA and TRAPRE.
• When registers TRAPRE and TRA are written while the count is stopped,
• When registers TRAPRE and TRA are written during the count, values are
• Measurement level setting
• Measured pulse input pin select function
• Digital filter function
Programmable I/O port
level, or conversely only “L” level.
and the count is continued.
interrupt]
values are written to both the reload register and counter.
written to the reload register and counter (refer to 17.3.2 Timer Write
Control during Count Operation ).
The “H” level or “L” level period is selected by the TEDGSEL bit in the
TRAIOC register.
P1_5 or P1_7 is selected by bits TRAIOSEL0 to TRAIOSEL1 in the TRASR
register.
Whether enabling or disabling the digital filter and the sampling frequency is
selected by bits TIPF0 and TIPF1 in the TRAIOC register.
Specification
Page 222 of 740
17. Timer RA

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