r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 266

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
18.3
Table 18.2
18.3.1
Count sources
Count operations
Divide ratio
Count start condition
Count stop conditions
Interrupt request
generation timing
TRBO pin function
INT0 pin function
Read from timer
Write to timer
In timer mode, a count source which is internally generated or timer RA underflows are counted (refer to Table
18.2 Timer Mode Specifications). Registers TRBOCR and TRBSC are not used in timer mode.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 010Ah
Symbol
Timer Mode
INOSTG One-shot trigger control bit
INOSEG One-shot trigger polarity select bit
Symbol
TOCNT Timer RB output switch bit
Bit
TOPL
Item
Timer RB I/O Control Register (TRBIOC) in Timer Mode
—
—
—
—
Timer Mode Specifications
b7
—
0
Timer RB output level select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
b6
—
f1, f2, f8, timer RA underflow
• Decrement
• When the timer underflows, it reloads the reload register contents before the
1/(n+1)(m+1)
n: setting value in TRBPRE register, m: setting value in TRBPR register
1 (count starts) is written to the TSTART bit in the TRBCR register.
• 0 (count stops) is written to the TSTART bit in the TRBCR register.
• 1 (count forcibly stop) is written to the TSTOP bit in the TRBCR register.
When timer RB underflows [timer RB interrupt].
Programmable I/O port
Programmable I/O port or INT0 interrupt input
The count value can be read out by reading registers TRBPR and TRBPRE.
• When registers TRBPRE and TRBPR are written while the count is stopped,
• When registers TRBPRE and TRBPR are written to while count operation is in
0
count continues (when timer RB underflows, the contents of timer RB primary
reload register is reloaded).
values are written to both the reload register and counter.
progress:
If the TWRC bit in the TRBMR register is set to 0, the value is written to both
the reload register and the counter.
If the TWRC bit is set to 1, the value is written to the reload register only.
(Refer to 18.3.2 Timer Write Control during Count Operation .)
Bit Name
b5
—
0
b4
—
0
INOSEG INOSTG
Set to 0 in timer mode.
b3
0
Specification
b2
0
TOCNT
Function
b1
0
TOPL
b0
0
Page 234 of 740
18. Timer RB
R/W
R/W
R/W
R/W
R/W
—