r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 302
r5f21346mnfp
Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21346MNFP.pdf
(776 pages)
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Part Number:
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
19.4.1
Notes:
1. When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in the
2. When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in the
3. The IOA3 bit is enabled when the IOA2 bit is set to 1 (input capture function).
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0124h
TRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register.
TRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register.
Symbol
Symbol
Bit
IOA0
IOA1
IOA2
IOA3
IOB0
IOB1
IOB2
Timer RC I/O Control Register 0 (TRCIOR0) for Input Capture Function
—
b7
—
1
TRCGRA control bit
TRCGRA mode select bit
TRCGRA input capture input switch
bit
TRCGRB control bit
TRCGRB mode select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
(3)
IOB2
b6
0
Bit Name
IOB1
b5
0
(1)
(2)
IOB0
b4
0
b1 b0
Set to 1 (input capture) in the input capture function.
0: fOCO128 signal
1: TRCIOA pin input
b5 b4
Set to 1 (input capture) in the input capture function.
0 0: Input capture to the TRCGRA register at the
0 1: Input capture to the TRCGRA register at the
1 0: Input capture to the TRCGRA register at both
1 1: Do not set.
0 0: Input capture to the TRCGRB register at the
0 1: Input capture to the TRCGRB register at the
1 0: Input capture to the TRCGRB register at both
1 1: Do not set.
IOA3
b3
1
rising edge
falling edge
edges
rising edge
falling edge
edges
IOA2
b2
0
Function
IOA1
b1
0
IOA0
b0
0
Page 270 of 740
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
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