r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 360

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
20.4.6
20.4.7
Notes:
1. Set bits CMD1 to CMD0 when both the TSTART0 and TSTART1 bits in the TRDSTR register are set to 0 (count
2. When bits CMD1 to CMD0 are set to 00b (timer mode, PWM mode, or PWM3 mode), the setting of the PWM3 bit
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0139h
Address 013Ah
stops).
is enabled.
Symbol
Symbol
PWMC0 PWM mode of TRDIOC0 select bit
PWMD0 PWM mode of TRDIOD0 select bit
PWMC1 PWM mode of TRDIOC1 select bit
PWMD1 PWM mode of TRDIOD1 select bit
PWMB0 PWM mode of TRDIOB0 select bit
PWMB1 PWM mode of TRDIOB1 select bit
Symbol
ADTRG
Symbol
STCLK
Bit
Bit
PWM3
CMD0
CMD1
ADEG
OLS0
OLS1
Timer RD PWM Mode Register (TRDPMR) in Output Compare Function
Timer RD Function Control Register (TRDFCR) in Output Compare
Function
—
—
PWM3
b7
b7
—
1
1
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Combination mode select bit
Normal-phase output level select bit
(in reset synchronous PWM mode or
complementary PWM mode)
Counter-phase output level select bit
(in reset synchronous PWM mode or
complementary PWM mode)
A/D trigger enable bit
(in complementary PWM mode)
A/D trigger edge select bit
(in complementary PWM mode)
External clock input select bit
PWM3 mode select bit
PWMD1 PWMC1 PWMB1
STCLK
b6
b6
0
0
Bit Name
Bit Name
ADEG
b5
b5
0
0
(2)
ADTRG
(1)
b4
b4
0
0
Set to 0 (timer mode) in the output compare
function.
Set to 0 (timer mode) in the output compare
function.
OLS1
b3
b3
—
1
0
Set to 00b (timer mode, PWM mode, or PWM3
mode) in the output compare function.
This bit is disabled in the output compare
function.
0: External clock input disabled
1: External clock input enabled
Set this bit to 1 (other than PWM3 mode) in the
output compare function.
PWMD0 PWMC0 PWMB0
OLS0
b2
b2
0
0
Function
CMD1
Function
b1
b1
0
0
CMD0
b0
b0
0
0
Page 328 of 740
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—