r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 376

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
20.5.1
Notes:
20.5.2
Note:
1. Stop the SSU and the I
2. Stop the timer RD function before setting to standby. When the MSTTRD bit is set to 1 (standby), any access to
3. To set the MSTTRD bit to 1 (standby), set bits TCK2 to TCK0 in the TRDCRi (i = 0 or 1) register to 000b (f1).
4. Stop the timer RC function before setting to standby. When the MSTTRC bit is set to 1 (standby), any access to
1. Enabled when in timer mode.
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0008h
Address 0135h
access to the SSU or the I
the timer RD associated registers (addresses 0135h to 015Fh) is disabled.
the timer RC associated registers (addresses 0120h to 0133h) is disabled.
Symbol
Symbol ITCLK1
MSTTRD Timer RD standby bit
MSTTRC Timer RC standby bit
Symbol
MSTIIC SSU, I
Symbol
ITCLK0 Timer RD0 fC2 select bit
ITCLK1 Timer RD1 fC2 select bit
Bit
Bit
Module Standby Control Register (MSTCR)
Timer RD Control Expansion Register (TRDECR)
—
—
—
—
—
—
—
—
—
—
—
b7
b7
—
0
0
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
2
C bus standby bit
2
b6
b6
—
—
0
C bus functions before setting to standby. When the MSTIIC bit is set to 1 (standby), any
0
2
Bit Name
C bus associated registers (addresses 0193h to 019Dh) is disabled.
Bit Name
MSTTRC MSTTRD MSTIIC
b5
b5
—
0
0
b4
b4
—
0
0
0: TRDCLK input selected
1: fC2 selected
0: TRDCLK input selected
1: fC2 selected
ITCLK0
0: Active
1: Standby
0: Active
1: Standby
0: Active
1: Standby
b3
b3
0
0
(1)
(2, 3)
(4)
(1)
(1)
b2
b2
—
—
0
0
Function
Function
b1
—
b1
—
0
0
b0
b0
—
—
0
0
Page 344 of 740
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—