r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 384

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
20.5.15 Timer RD Counter i (TRDi) (i = 0 or 1) in PWM Mode
20.5.16 Timer RD General Registers Ai, Bi, Ci, and Di (TRDGRAi, TRDGRBi,
Table 20.10
i = 0 or 1
BFCi, BFDi: Bits in TRDMR register
b15 to b0 Count the count source. Count operation is incremented.
b15 to b0 Refer to Table 20.10 TRDGRji Register Functions in PWM Mode
TRDGRAi
TRDGRBi
TRDGRCi
TRDGRDi
TRDGRCi
TRDGRDi
After Reset
After Reset
After Reset
After Reset
Register
Bit
Bit
Address 0147h to 0146h (TRD0), 0157h to 0156h (TRD1)
Address 0149h to 0148h (TRDGRA0), 014Bh to 014Ah (TRDGRB0), 014Dh to 014Ch (TRDGRC0),
Access the TRDi register in 16-bit units. Do not access it in 8-bit units.
Access registers TRDGRAi to TRDGRDi in 16-bit units. Do not access them in 8-bit units.
The following registers are disabled in the PWM mode: TRDDF0, TRDDF1, TRDIORA0, TRDIORC0,
TRDIORA1, and TRDIORC1.
Symbol
Symbol
Symbol
Symbol
Bit
Bit
Bit
Bit
When an overflow occurs, the OVF bit in the TRDSRi register is set to 1.
TRDGRCi, TRDGRDi) (i = 0 or 1) in PWM Mode
014Fh to 014Eh (TRDGRD0), 0159h to 0158h (TRDGRA1), 015Bh to 015Ah (TRDGRB1),
015Dh to 015Ch (TRDGRC1), 015Fh to 015Eh (TRDGRD1)
−
−
BFCi = 0
BFDi = 0
BFCi = 1
BFDi = 1
TRDGRji Register Functions in PWM Mode
b15
b15
b7
b7
—
—
—
—
Setting
0
0
1
1
b14
b14
b6
b6
—
—
—
—
0
0
1
1
General register. Set the PWM period
General register. Set the changing point of PWM output TRDIOBi
General register. Set the changing point of PWM output TRDIOCi
Buffer register. Set the next PWM period
(Refer to 20.2.2 Buffer Operation .)
Buffer register. Set the changing point of the next PWM
output
(Refer to 20.2.2 Buffer Operation .)
b13
b13
b5
—
—
b5
—
—
0
0
1
1
Function
b12
b12
b4
b4
—
—
—
—
0
0
1
1
Register Function
Function
b11
b11
b3
b3
—
—
—
—
0
0
1
1
b10
b10
b2
b2
—
—
—
—
0
0
1
1
b1
b9
b1
b9
—
—
—
—
0
0
1
1
0000h to FFFFh
Setting Range
b0
b8
b0
b8
—
—
—
—
0
0
1
1
−
TRDIODi
−
TRDIOBi
PWM Output Pin
Page 352 of 740
20. Timer RD
R/W
R/W
R/W
R/W