r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 438

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
20.10.5 Count Source Switch
20.10.6 Input Capture Function
20.10.7 Reset Synchronous PWM Mode
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Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
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Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait 2 or more cycles of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).
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Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of two cycles of fOCO-F.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
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Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of one cycle of fOCO-F + fOCO40M.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
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Switching procedure
(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).
(3) Set bits CMD1 to CMD0 to 01b (reset synchronous PWM mode).
(4) Set the other registers associated with timer RD again.
Switch the count source after the count stops.
When changing the count source from fOCO40M to another source and stopping fOCO40M, wait 2 cycles of
f1 or more after setting the clock switch, and then stop fOCO40M.
After switching the count source from fOCO-F to fOCO40M, allow a minimum of two cycles of fOCO-F to
elapse after changing the clock setting before stopping fOCO-F.
After switching the count source from fOCO-F to a clock other than fOCO40M, allow a minimum of one
cycle of fOCO-F + fOCO40M to elapse after changing the clock setting before stopping fOCO-F.
Set the pulse width of the input capture signal to 3 or more cycles of the timer RD operation clock (refer to
Table 20.1 Timer RD Operation Clocks).
The value in the TRDi register is transferred to the TRDGRji register 2 to 3 cycles of the timer RD operation
clock after the input capture signal is applied to the TRDIOji (i = 0 or 1, j = A, B, C, or D) pin (no digital
filter).
When the input capture function is used, if an edge selected by bits IOj0 and IOj1 in the TRDIORAi or
TRDIORCi register (i = 0 or 1, j = A, B, C, or D) is input to the TRDIOji pin, the IMFj bit in the TRDSRi
register is set to 1 even when the TSTARTi bit in the TRDSTR register is 0 (count stops).
When reset synchronous PWM mode is used for motor control, make sure OLS0 = OLS1.
Set to reset synchronous PWM mode by the following procedure:
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20. Timer RD