r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 440

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r5f21346mnfp

Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 20.26
TRDGRB0 register
TRDGRA1 register
TRDGRB1 register
TRDSR0 register
TRDSR0 register
Count value in TRD1
The TRD1 register counts 1, 0, FFFFh, 0, 1, in that order, when changing from decrement to increment
operation.
The UDF bit is set to 1 when changing between 1, 0, and FFFFh operation. Also, when bits CMD1 to CMD0
in the TRDFCR register are set to 10b (complementary PWM mode, buffer data transferred at underflow in
the TRD1 register), the content in the buffer registers (TRDGRD0, TRDGRC1, and TRDGRD1) is
transferred to the general registers (TRDGRB0, TRDGRA1, and TRDGRB1). During FFFFh, 0, 1 operation,
data are not transferred to registers such as the TRDGRB0 register. Also, at this time, the OVF bit remains
unchanged.
UDF bit in
OVF bit in
FFFFh
Operation when TRD1 Register Underflows in Complementary PWM Mode
register
1
0
0
Set to 0 by a program
Transferred from
buffer register
No change
Not transferred from buffer register
When bits CMD1 to CMD0 in the
TRDFCR register are set to 10b
(transfer from the buffer register to the
general register when the TRD1 register
underflows).
Page 408 of 740
20. Timer RD

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