r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 466

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
22.2.6
Note:
1. Bits SUM, PER, FER, and OER are set to 0 (no error) when either of the following is set:
2. These error flags are invalid when bits SMD2 to SMD0 in the UiMR register are set to 001b (clock synchronous
After Reset
After Reset
b10
b11
b12
b13
b14
b15
Bit
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
Address 00A7h to 00A6h (U0RB), 0167h to 0166h (U1RB)
- Bits SMD2 to SMD0 in the UiMR register are set to 000b (serial interface disabled), or
- The RE bit in the UiC1 register is set to 0 (reception disabled)
The SUM bit is set to 0 (no error) when all of bits PER, FER, and OER are set to 0 (no error).
Bits PER and FER are also set to 0 when the high-order byte of the UiRB register is read.
When setting bits SMD2 to SMD0 in the UiMR register to 000b, set the TE bit in the UiC1 register to 0
(transmission disabled) and the RE bit to 0 (reception disabled).
serial I/O mode). When read, the content is undefined.
Always read the UiRB register in 16-bit units.
Symbol
Symbol
Symbol
Bit
Bit
OER
SUM
PER
FER
UARTi Receive Buffer Register (UiRB) (i = 0 or 1)
—
—
—
—
—
—
—
—
—
—
—
—
SUM
b15
b7
—
X
X
—
—
Nothing is assigned. If necessary, set to 0. When read, the content is undefined.
Overrun error flag
Framing error flag
Parity error flag
Error sum flag
PER
b14
b6
—
X
X
(1, 2)
Bit Name
(1, 2)
(1)
(1, 2)
FER
b13
b5
—
X
X
OER
b12
b4
—
X
X
b11
b3
Receive data (D7 to D0)
Receive data (D8)
0: No overrun error
1: Overrun error
0: No framing error
1: Framing error
0: No parity error
1: Parity error
0: No error
1: Error
—
—
X
X
b10
b2
—
—
X
X
22. Serial Interface (UARTi (i = 0 or 1))
Function
b1
b9
—
—
X
X
b0
b8
—
—
X
X
Page 434 of 740
R/W
—
R
R
R
R
R
R