r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 611

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r5f21346mnfp

Manufacturer Part Number
r5f21346mnfp
Description
Single-chip Mcus Incorporates The R8c Cpu Core
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21346mnfp#V0
Manufacturer:
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R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
28. A/D Converter
The A/D converter consists of one 10-bit successive approximation A/D converter circuit with a capacitive coupling
amplifier. The analog input shares pins P0_0 to P0_7, and P1_0 to P1_3.
28.1
Table 28.1
Notes:
A/D conversion method
Analog input voltage
Operating clock φ AD
Resolution
Absolute accuracy
Operating mode
Analog input pin
A/D conversion start condition
Conversion rate per pin
( φ AD = fAD)
Table 28.1 lists the A/D Converter Performance. Figure 28.1 shows a Block Diagram of A/D Converter.
1. When the analog input voltage is over the reference voltage, the A/D conversion result will be 3FFh
2. Refer to Table 34.3 A/D Converter Characteristics for the operating clock φ AD.
3. The conversion rate per pin is minimum 44 φ AD cycles for 8-bit and 10-bit resolution.
in 10-bit mode and FFh in 8-bit mode.
Overview
Item
A/D Converter Performance
(1)
(2)
Successive approximation (with capacitive coupling amplifier)
0 V to AVCC
fAD, fAD divided by 2, fAD divided by 4, fAD divided by 8
(fAD=f1 or fOCO-F)
8 bits or 10 bits selectable
AVCC = Vref = 5 V, φ AD = 20 MHz
AVCC = Vref = 3.3 V, φ AD = 16 MHz
AVCC = Vref = 3.0 V, φ AD = 10 MHz
AVCC = Vref = 2.2 V, φ AD = 5 MHz
One-shot mode, repeat mode 0, repeat mode 1, single sweep mode,
and repeat sweep mode
12 pins (AN0 to AN11)
• Software trigger
• Timer RD
• Timer RC
• External trigger
Minimum 44 φ AD cycles
(Refer to 28.3.3 A/D Conversion Start Condition .)
• 8-bit resolution
• 10-bit resolution ±3 LSB
• 8-bit resolution
• 10-bit resolution ±5 LSB
• 8-bit resolution
• 10-bit resolution ±5 LSB
• 8-bit resolution
• 10-bit resolution ±5 LSB
±2 LSB
±2 LSB
±2 LSB
±2 LSB
Performance
28. A/D Converter
Page 579 of 740

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